drivers/crypto/hisilicon/zip/zip.h
Source file repositories/reference/linux-study-clean/drivers/crypto/hisilicon/zip/zip.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/crypto/hisilicon/zip/zip.h- Extension
.h- Size
- 2289 bytes
- Lines
- 115
- Domain
- Driver Families
- Bucket
- drivers/crypto
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/list.hlinux/hisi_acc_qm.h
Detected Declarations
struct hisi_zip_dfxstruct hisi_zip_ctrlstruct hisi_zipstruct hisi_zip_sqeenum hisi_zip_error_typeenum zip_cap_table_type
Annotated Snippet
struct hisi_zip_dfx {
atomic64_t send_cnt;
atomic64_t recv_cnt;
atomic64_t send_busy_cnt;
atomic64_t err_bd_cnt;
};
struct hisi_zip_ctrl;
struct hisi_zip {
struct hisi_qm qm;
struct hisi_zip_ctrl *ctrl;
struct hisi_zip_dfx dfx;
};
struct hisi_zip_sqe {
u32 consumed;
u32 produced;
u32 comp_data_length;
/*
* status: 0~7 bits
* rsvd: 8~31 bits
*/
u32 dw3;
u32 input_data_length;
u32 dw5;
u32 dw6;
/*
* in_sge_data_offset: 0~23 bits
* rsvd: 24~27 bits
* sqe_type: 29~31 bits
*/
u32 dw7;
/*
* out_sge_data_offset: 0~23 bits
* rsvd: 24~31 bits
*/
u32 dw8;
/*
* request_type: 0~7 bits
* buffer_type: 8~11 bits
* rsvd: 13~31 bits
*/
u32 dw9;
u32 dw10;
u32 dw11;
u32 dw12;
/* tag: in sqe type 0 */
u32 dw13;
u32 dest_avail_out;
u32 dw15;
u32 dw16;
u32 dw17;
u32 source_addr_l;
u32 source_addr_h;
u32 dest_addr_l;
u32 dest_addr_h;
u32 dw22;
u32 dw23;
u32 dw24;
u32 dw25;
/* tag: in sqe type 3 */
u32 dw26;
u32 dw27;
u32 rsvd1[4];
};
enum zip_cap_table_type {
QM_RAS_NFE_TYPE,
QM_RAS_NFE_RESET,
QM_RAS_CE_TYPE,
ZIP_RAS_NFE_TYPE,
ZIP_RAS_NFE_RESET,
ZIP_RAS_CE_TYPE,
ZIP_CORE_INFO,
ZIP_CORE_EN,
ZIP_DRV_ALG_BITMAP_TB,
ZIP_ALG_BITMAP,
ZIP_CORE1_BITMAP,
ZIP_CORE2_BITMAP,
ZIP_CORE3_BITMAP,
ZIP_CORE4_BITMAP,
ZIP_CORE5_BITMAP,
};
int zip_create_qps(struct hisi_qp **qps, int qp_num, int node, u8 *alg_type);
int hisi_zip_register_to_crypto(struct hisi_qm *qm);
void hisi_zip_unregister_from_crypto(struct hisi_qm *qm);
bool hisi_zip_alg_support(struct hisi_qm *qm, u32 alg);
int hisi_dae_set_user_domain(struct hisi_qm *qm);
Annotation
- Immediate include surface: `linux/list.h`, `linux/hisi_acc_qm.h`.
- Detected declarations: `struct hisi_zip_dfx`, `struct hisi_zip_ctrl`, `struct hisi_zip`, `struct hisi_zip_sqe`, `enum hisi_zip_error_type`, `enum zip_cap_table_type`.
- Atlas domain: Driver Families / drivers/crypto.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.