drivers/crypto/img-hash.c
Source file repositories/reference/linux-study-clean/drivers/crypto/img-hash.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/crypto/img-hash.c- Extension
.c- Size
- 27523 bytes
- Lines
- 1086
- Domain
- Driver Families
- Bucket
- drivers/crypto
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/clk.hlinux/dma-mapping.hlinux/dmaengine.hlinux/interrupt.hlinux/io.hlinux/kernel.hlinux/module.hlinux/mod_devicetable.hlinux/platform_device.hlinux/scatterlist.hcrypto/internal/hash.hcrypto/md5.hcrypto/sha1.hcrypto/sha2.h
Detected Declarations
struct img_hash_devstruct img_hash_request_ctxstruct img_hash_ctxstruct img_hash_devstruct img_hash_drvfunction img_hash_readfunction img_hash_writefunction img_hash_read_result_queuefunction img_hash_startfunction img_hash_xmit_cpufunction img_hash_dma_callbackfunction img_hash_xmit_dmafunction img_hash_write_via_cpufunction img_hash_finishfunction img_hash_copy_hashfunction img_hash_finish_reqfunction img_hash_write_via_dmafunction img_hash_dma_initfunction img_hash_dma_taskfunction img_hash_write_via_dma_stopfunction img_hash_process_datafunction img_hash_hw_initfunction img_hash_initfunction img_hash_handle_queuefunction img_hash_updatefunction img_hash_finalfunction img_hash_finupfunction img_hash_importfunction img_hash_exportfunction img_hash_digestfunction img_hash_cra_initfunction img_hash_cra_md5_initfunction img_hash_cra_sha1_initfunction img_hash_cra_sha224_initfunction img_hash_cra_sha256_initfunction img_hash_cra_exitfunction img_irq_handlerfunction img_register_algsfunction img_unregister_algsfunction img_hash_done_taskfunction img_hash_probefunction img_hash_removefunction img_hash_suspendfunction img_hash_resume
Annotated Snippet
struct img_hash_request_ctx {
struct img_hash_dev *hdev;
u8 digest[SHA256_DIGEST_SIZE] __aligned(sizeof(u32));
unsigned long flags;
size_t digsize;
dma_addr_t dma_addr;
size_t dma_ct;
/* sg root */
struct scatterlist *sgfirst;
/* walk state */
struct scatterlist *sg;
size_t nents;
size_t offset;
unsigned int total;
size_t sent;
unsigned long op;
size_t bufcnt;
struct ahash_request fallback_req;
/* Zero length buffer must remain last member of struct */
u8 buffer[] __aligned(sizeof(u32));
};
struct img_hash_ctx {
struct img_hash_dev *hdev;
unsigned long flags;
struct crypto_ahash *fallback;
};
struct img_hash_dev {
struct list_head list;
struct device *dev;
struct clk *hash_clk;
struct clk *sys_clk;
void __iomem *io_base;
phys_addr_t bus_addr;
void __iomem *cpu_addr;
spinlock_t lock;
int err;
struct tasklet_struct done_task;
struct tasklet_struct dma_task;
unsigned long flags;
struct crypto_queue queue;
struct ahash_request *req;
struct dma_chan *dma_lch;
};
struct img_hash_drv {
struct list_head dev_list;
spinlock_t lock;
};
static struct img_hash_drv img_hash = {
.dev_list = LIST_HEAD_INIT(img_hash.dev_list),
.lock = __SPIN_LOCK_UNLOCKED(img_hash.lock),
};
static inline u32 img_hash_read(struct img_hash_dev *hdev, u32 offset)
{
return readl_relaxed(hdev->io_base + offset);
}
static inline void img_hash_write(struct img_hash_dev *hdev,
u32 offset, u32 value)
{
writel_relaxed(value, hdev->io_base + offset);
}
static inline __be32 img_hash_read_result_queue(struct img_hash_dev *hdev)
{
return cpu_to_be32(img_hash_read(hdev, CR_RESULT_QUEUE));
}
static void img_hash_start(struct img_hash_dev *hdev, bool dma)
{
struct img_hash_request_ctx *ctx = ahash_request_ctx(hdev->req);
u32 cr = IMG_HASH_BYTE_ORDER << CR_CONTROL_BYTE_ORDER_SHIFT;
if (ctx->flags & DRIVER_FLAGS_MD5)
cr |= CR_CONTROL_ALGO_MD5;
else if (ctx->flags & DRIVER_FLAGS_SHA1)
cr |= CR_CONTROL_ALGO_SHA1;
Annotation
- Immediate include surface: `linux/clk.h`, `linux/dma-mapping.h`, `linux/dmaengine.h`, `linux/interrupt.h`, `linux/io.h`, `linux/kernel.h`, `linux/module.h`, `linux/mod_devicetable.h`.
- Detected declarations: `struct img_hash_dev`, `struct img_hash_request_ctx`, `struct img_hash_ctx`, `struct img_hash_dev`, `struct img_hash_drv`, `function img_hash_read`, `function img_hash_write`, `function img_hash_read_result_queue`, `function img_hash_start`, `function img_hash_xmit_cpu`.
- Atlas domain: Driver Families / drivers/crypto.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.