drivers/crypto/intel/keembay/ocs-hcu.c
Source file repositories/reference/linux-study-clean/drivers/crypto/intel/keembay/ocs-hcu.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/crypto/intel/keembay/ocs-hcu.c- Extension
.c- Size
- 23103 bytes
- Lines
- 842
- Domain
- Driver Families
- Bucket
- drivers/crypto
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/delay.hlinux/device.hlinux/iopoll.hlinux/irq.hlinux/module.hcrypto/sha2.hocs-hcu.h
Detected Declarations
struct ocs_hcu_dma_entrystruct ocs_hcu_dma_listfunction ocs_hcu_num_chainsfunction ocs_hcu_digest_sizefunction ocs_hcu_wait_busyfunction ocs_hcu_done_irq_enfunction ocs_hcu_dma_irq_enfunction ocs_hcu_irq_disfunction ocs_hcu_wait_and_disable_irqfunction ocs_hcu_get_intermediate_datafunction ocs_hcu_set_intermediate_datafunction ocs_hcu_get_digestfunction ocs_hcu_hw_cfgfunction ocs_hcu_clear_keyfunction ocs_hcu_write_keyfunction ocs_hcu_ll_dma_startfunction ocs_hcu_dma_list_freefunction ocs_hcu_dma_list_add_tailfunction tailfunction ocs_hcu_hash_initfunction ocs_hcu_hash_updatefunction ocs_hcu_hash_finupfunction ocs_hcu_hash_finalfunction ocs_hcu_digestfunction ocs_hcu_hmacfunction ocs_hcu_irq_handler
Annotated Snippet
struct ocs_hcu_dma_entry {
u32 src_addr;
u32 src_len;
u32 nxt_desc;
u32 ll_flags;
};
/**
* struct ocs_hcu_dma_list - OCS-specific DMA linked list.
* @head: The head of the list (points to the array backing the list).
* @tail: The current tail of the list; NULL if the list is empty.
* @dma_addr: The DMA address of @head (i.e., the DMA address of the backing
* array).
* @max_nents: Maximum number of entries in the list (i.e., number of elements
* in the backing array).
*
* The OCS DMA list is an array-backed list of OCS DMA descriptors. The array
* backing the list is allocated with dma_alloc_coherent() and pointed by
* @head.
*/
struct ocs_hcu_dma_list {
struct ocs_hcu_dma_entry *head;
struct ocs_hcu_dma_entry *tail;
dma_addr_t dma_addr;
size_t max_nents;
};
static inline u32 ocs_hcu_num_chains(enum ocs_hcu_algo algo)
{
switch (algo) {
case OCS_HCU_ALGO_SHA224:
case OCS_HCU_ALGO_SHA256:
case OCS_HCU_ALGO_SM3:
return OCS_HCU_NUM_CHAINS_SHA256_224_SM3;
case OCS_HCU_ALGO_SHA384:
case OCS_HCU_ALGO_SHA512:
return OCS_HCU_NUM_CHAINS_SHA384_512;
default:
return 0;
};
}
static inline u32 ocs_hcu_digest_size(enum ocs_hcu_algo algo)
{
switch (algo) {
case OCS_HCU_ALGO_SHA224:
return SHA224_DIGEST_SIZE;
case OCS_HCU_ALGO_SHA256:
case OCS_HCU_ALGO_SM3:
/* SM3 shares the same block size. */
return SHA256_DIGEST_SIZE;
case OCS_HCU_ALGO_SHA384:
return SHA384_DIGEST_SIZE;
case OCS_HCU_ALGO_SHA512:
return SHA512_DIGEST_SIZE;
default:
return 0;
}
}
/**
* ocs_hcu_wait_busy() - Wait for HCU OCS hardware to became usable.
* @hcu_dev: OCS HCU device to wait for.
*
* Return: 0 if device free, -ETIMEOUT if device busy and internal timeout has
* expired.
*/
static int ocs_hcu_wait_busy(struct ocs_hcu_dev *hcu_dev)
{
long val;
return readl_poll_timeout(hcu_dev->io_base + OCS_HCU_STATUS, val,
!(val & HCU_STATUS_BUSY),
OCS_HCU_WAIT_BUSY_RETRY_DELAY_US,
OCS_HCU_WAIT_BUSY_TIMEOUT_US);
}
static void ocs_hcu_done_irq_en(struct ocs_hcu_dev *hcu_dev)
{
/* Clear any pending interrupts. */
writel(0xFFFFFFFF, hcu_dev->io_base + OCS_HCU_ISR);
hcu_dev->irq_err = false;
/* Enable error and HCU done interrupts. */
writel(HCU_IRQ_HASH_DONE | HCU_IRQ_HASH_ERR_MASK,
hcu_dev->io_base + OCS_HCU_IER);
}
static void ocs_hcu_dma_irq_en(struct ocs_hcu_dev *hcu_dev)
{
/* Clear any pending interrupts. */
Annotation
- Immediate include surface: `linux/delay.h`, `linux/device.h`, `linux/iopoll.h`, `linux/irq.h`, `linux/module.h`, `crypto/sha2.h`, `ocs-hcu.h`.
- Detected declarations: `struct ocs_hcu_dma_entry`, `struct ocs_hcu_dma_list`, `function ocs_hcu_num_chains`, `function ocs_hcu_digest_size`, `function ocs_hcu_wait_busy`, `function ocs_hcu_done_irq_en`, `function ocs_hcu_dma_irq_en`, `function ocs_hcu_irq_dis`, `function ocs_hcu_wait_and_disable_irq`, `function ocs_hcu_get_intermediate_data`.
- Atlas domain: Driver Families / drivers/crypto.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.