drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.c
Source file repositories/reference/linux-study-clean/drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.c- Extension
.c- Size
- 15650 bytes
- Lines
- 492
- Domain
- Driver Families
- Bucket
- drivers/crypto
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/iopoll.hadf_accel_devices.hadf_admin.hadf_bank_state.hadf_cfg.hadf_cfg_services.hadf_clock.hadf_common_drv.hadf_fw_config.hadf_gen4_config.hadf_gen4_hw_csr_data.hadf_gen4_hw_data.hadf_gen4_pfvf.hadf_gen4_pm.hadf_gen4_ras.hadf_gen4_tl.hadf_gen4_vf_mig.hadf_timer.hadf_4xxx_hw_data.hicp_qat_hw.h
Detected Declarations
function get_ae_maskfunction get_accel_capfunction adf_init_rl_datafunction uof_get_num_objsfunction get_rp_groupfunction get_ena_thd_maskfunction get_ena_thd_mask_401xxfunction uof_get_obj_typefunction uof_get_ae_maskfunction adf_gen4_set_err_maskfunction adf_init_hw_data_4xxxfunction adf_clean_hw_data_4xxx
Annotated Snippet
// SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only)
/* Copyright(c) 2020 - 2021 Intel Corporation */
#include <linux/iopoll.h>
#include <adf_accel_devices.h>
#include <adf_admin.h>
#include <adf_bank_state.h>
#include <adf_cfg.h>
#include <adf_cfg_services.h>
#include <adf_clock.h>
#include <adf_common_drv.h>
#include <adf_fw_config.h>
#include <adf_gen4_config.h>
#include <adf_gen4_hw_csr_data.h>
#include <adf_gen4_hw_data.h>
#include <adf_gen4_pfvf.h>
#include <adf_gen4_pm.h>
#include "adf_gen4_ras.h"
#include <adf_gen4_tl.h>
#include <adf_gen4_vf_mig.h>
#include <adf_timer.h>
#include "adf_4xxx_hw_data.h"
#include "icp_qat_hw.h"
#define ADF_AE_GROUP_0 GENMASK(3, 0)
#define ADF_AE_GROUP_1 GENMASK(7, 4)
#define ADF_AE_GROUP_2 BIT(8)
#define ENA_THD_MASK_ASYM GENMASK(1, 0)
#define ENA_THD_MASK_ASYM_401XX GENMASK(5, 0)
#define ENA_THD_MASK_SYM GENMASK(6, 0)
#define ENA_THD_MASK_DC GENMASK(1, 0)
static const char * const adf_4xxx_fw_objs[] = {
[ADF_FW_SYM_OBJ] = ADF_4XXX_SYM_OBJ,
[ADF_FW_ASYM_OBJ] = ADF_4XXX_ASYM_OBJ,
[ADF_FW_DC_OBJ] = ADF_4XXX_DC_OBJ,
[ADF_FW_ADMIN_OBJ] = ADF_4XXX_ADMIN_OBJ,
};
static const char * const adf_402xx_fw_objs[] = {
[ADF_FW_SYM_OBJ] = ADF_402XX_SYM_OBJ,
[ADF_FW_ASYM_OBJ] = ADF_402XX_ASYM_OBJ,
[ADF_FW_DC_OBJ] = ADF_402XX_DC_OBJ,
[ADF_FW_ADMIN_OBJ] = ADF_402XX_ADMIN_OBJ,
};
static const struct adf_fw_config adf_fw_cy_config[] = {
{ADF_AE_GROUP_1, ADF_FW_SYM_OBJ},
{ADF_AE_GROUP_0, ADF_FW_ASYM_OBJ},
{ADF_AE_GROUP_2, ADF_FW_ADMIN_OBJ},
};
static const struct adf_fw_config adf_fw_dc_config[] = {
{ADF_AE_GROUP_1, ADF_FW_DC_OBJ},
{ADF_AE_GROUP_0, ADF_FW_DC_OBJ},
{ADF_AE_GROUP_2, ADF_FW_ADMIN_OBJ},
};
static const struct adf_fw_config adf_fw_sym_config[] = {
{ADF_AE_GROUP_1, ADF_FW_SYM_OBJ},
{ADF_AE_GROUP_0, ADF_FW_SYM_OBJ},
{ADF_AE_GROUP_2, ADF_FW_ADMIN_OBJ},
};
static const struct adf_fw_config adf_fw_asym_config[] = {
{ADF_AE_GROUP_1, ADF_FW_ASYM_OBJ},
{ADF_AE_GROUP_0, ADF_FW_ASYM_OBJ},
{ADF_AE_GROUP_2, ADF_FW_ADMIN_OBJ},
};
static const struct adf_fw_config adf_fw_asym_dc_config[] = {
{ADF_AE_GROUP_1, ADF_FW_ASYM_OBJ},
{ADF_AE_GROUP_0, ADF_FW_DC_OBJ},
{ADF_AE_GROUP_2, ADF_FW_ADMIN_OBJ},
};
static const struct adf_fw_config adf_fw_sym_dc_config[] = {
{ADF_AE_GROUP_1, ADF_FW_SYM_OBJ},
{ADF_AE_GROUP_0, ADF_FW_DC_OBJ},
{ADF_AE_GROUP_2, ADF_FW_ADMIN_OBJ},
};
static const struct adf_fw_config adf_fw_dcc_config[] = {
{ADF_AE_GROUP_1, ADF_FW_DC_OBJ},
{ADF_AE_GROUP_0, ADF_FW_SYM_OBJ},
{ADF_AE_GROUP_2, ADF_FW_ADMIN_OBJ},
};
static_assert(ARRAY_SIZE(adf_fw_cy_config) == ARRAY_SIZE(adf_fw_dc_config));
static_assert(ARRAY_SIZE(adf_fw_cy_config) == ARRAY_SIZE(adf_fw_sym_config));
Annotation
- Immediate include surface: `linux/iopoll.h`, `adf_accel_devices.h`, `adf_admin.h`, `adf_bank_state.h`, `adf_cfg.h`, `adf_cfg_services.h`, `adf_clock.h`, `adf_common_drv.h`.
- Detected declarations: `function get_ae_mask`, `function get_accel_cap`, `function adf_init_rl_data`, `function uof_get_num_objs`, `function get_rp_group`, `function get_ena_thd_mask`, `function get_ena_thd_mask_401xx`, `function uof_get_obj_type`, `function uof_get_ae_mask`, `function adf_gen4_set_err_mask`.
- Atlas domain: Driver Families / drivers/crypto.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.