drivers/crypto/intel/qat/qat_common/adf_accel_engine.c
Source file repositories/reference/linux-study-clean/drivers/crypto/intel/qat/qat_common/adf_accel_engine.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/crypto/intel/qat/qat_common/adf_accel_engine.c- Extension
.c- Size
- 5786 bytes
- Lines
- 220
- Domain
- Driver Families
- Bucket
- drivers/crypto
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/delay.hlinux/firmware.hlinux/pci.hadf_cfg.hadf_accel_devices.hadf_common_drv.hicp_qat_uclo.h
Detected Declarations
function adf_ae_fw_load_imagesfunction adf_ae_fw_loadfunction adf_ae_fw_releasefunction adf_ae_startfunction adf_ae_stopfunction adf_ae_resetfunction adf_ae_initfunction adf_ae_shutdown
Annotated Snippet
if (!obj_name || !ae_mask) {
dev_err(&GET_DEV(accel_dev), "Invalid UOF image\n");
goto out_err;
}
if (qat_uclo_set_cfg_ae_mask(loader, ae_mask)) {
dev_err(&GET_DEV(accel_dev),
"Invalid mask for UOF image\n");
goto out_err;
}
if (qat_uclo_map_obj(loader, fw_addr, fw_size, obj_name)) {
dev_err(&GET_DEV(accel_dev),
"Failed to map UOF firmware\n");
goto out_err;
}
if (qat_uclo_wr_all_uimage(loader)) {
dev_err(&GET_DEV(accel_dev),
"Failed to load UOF firmware\n");
goto out_err;
}
qat_uclo_del_obj(loader);
}
return 0;
out_err:
adf_ae_fw_release(accel_dev);
return -EFAULT;
}
int adf_ae_fw_load(struct adf_accel_dev *accel_dev)
{
struct adf_fw_loader_data *loader_data = accel_dev->fw_loader;
struct adf_hw_device_data *hw_device = accel_dev->hw_device;
void *fw_addr, *mmp_addr;
u32 fw_size, mmp_size;
if (!hw_device->fw_name)
return 0;
if (request_firmware(&loader_data->mmp_fw, hw_device->fw_mmp_name,
&accel_dev->accel_pci_dev.pci_dev->dev)) {
dev_err(&GET_DEV(accel_dev), "Failed to load MMP firmware %s\n",
hw_device->fw_mmp_name);
return -EFAULT;
}
if (request_firmware(&loader_data->uof_fw, hw_device->fw_name,
&accel_dev->accel_pci_dev.pci_dev->dev)) {
dev_err(&GET_DEV(accel_dev), "Failed to load UOF firmware %s\n",
hw_device->fw_name);
goto out_err;
}
fw_size = loader_data->uof_fw->size;
fw_addr = (void *)loader_data->uof_fw->data;
mmp_size = loader_data->mmp_fw->size;
mmp_addr = (void *)loader_data->mmp_fw->data;
if (qat_uclo_wr_mimage(loader_data->fw_loader, mmp_addr, mmp_size)) {
dev_err(&GET_DEV(accel_dev), "Failed to load MMP\n");
goto out_err;
}
if (hw_device->uof_get_num_objs)
return adf_ae_fw_load_images(accel_dev, fw_addr, fw_size);
if (qat_uclo_map_obj(loader_data->fw_loader, fw_addr, fw_size, NULL)) {
dev_err(&GET_DEV(accel_dev), "Failed to map FW\n");
goto out_err;
}
if (qat_uclo_wr_all_uimage(loader_data->fw_loader)) {
dev_err(&GET_DEV(accel_dev), "Failed to load UOF\n");
goto out_err;
}
return 0;
out_err:
adf_ae_fw_release(accel_dev);
return -EFAULT;
}
void adf_ae_fw_release(struct adf_accel_dev *accel_dev)
{
struct adf_fw_loader_data *loader_data = accel_dev->fw_loader;
struct adf_hw_device_data *hw_device = accel_dev->hw_device;
if (!hw_device->fw_name)
return;
qat_uclo_del_obj(loader_data->fw_loader);
Annotation
- Immediate include surface: `linux/delay.h`, `linux/firmware.h`, `linux/pci.h`, `adf_cfg.h`, `adf_accel_devices.h`, `adf_common_drv.h`, `icp_qat_uclo.h`.
- Detected declarations: `function adf_ae_fw_load_images`, `function adf_ae_fw_load`, `function adf_ae_fw_release`, `function adf_ae_start`, `function adf_ae_stop`, `function adf_ae_reset`, `function adf_ae_init`, `function adf_ae_shutdown`.
- Atlas domain: Driver Families / drivers/crypto.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.