drivers/crypto/intel/qat/qat_common/adf_gen4_pfvf.h

File Facts

System

Linux kernel

Corpus path

drivers/crypto/intel/qat/qat_common/adf_gen4_pfvf.h

Extension

.h

Size

472 bytes

Lines

19

Domain

Driver Families

Bucket

drivers/crypto

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• adf_accel_devices.h
• adf_common_drv.h

Detected Declarations

• function adf_gen4_init_pf_pfvf_ops

Annotated Snippet

#ifndef ADF_GEN4_PFVF_H
#define ADF_GEN4_PFVF_H

#include "adf_accel_devices.h"
#include "adf_common_drv.h"

#ifdef CONFIG_PCI_IOV
void adf_gen4_init_pf_pfvf_ops(struct adf_pfvf_ops *pfvf_ops);
#else
static inline void adf_gen4_init_pf_pfvf_ops(struct adf_pfvf_ops *pfvf_ops)
{
	pfvf_ops->enable_comms = adf_pfvf_comms_disabled;
}
#endif

#endif /* ADF_GEN4_PFVF_H */

Annotation

• Immediate include surface: `adf_accel_devices.h`, `adf_common_drv.h`.
• Detected declarations: `function adf_gen4_init_pf_pfvf_ops`.
• Atlas domain: Driver Families / drivers/crypto.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.