drivers/crypto/intel/qat/qat_common/adf_gen4_pm_debugfs.c

Source file repositories/reference/linux-study-clean/drivers/crypto/intel/qat/qat_common/adf_gen4_pm_debugfs.c

File Facts

System
Linux kernel
Corpus path
drivers/crypto/intel/qat/qat_common/adf_gen4_pm_debugfs.c
Extension
.c
Size
7519 bytes
Lines
200
Domain
Driver Families
Bucket
drivers/crypto
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-only
/* Copyright(c) 2023 Intel Corporation */
#include <linux/dma-mapping.h>
#include <linux/string_helpers.h>

#include "adf_accel_devices.h"
#include "adf_admin.h"
#include "adf_common_drv.h"
#include "adf_gen4_pm.h"
#include "adf_pm_dbgfs_utils.h"
#include "icp_qat_fw_init_admin.h"

#define PM_INFO_REGSET_ENTRY(_reg_, _field_)	\
	PM_INFO_REGSET_ENTRY_MASK(_reg_, _field_, ADF_GEN4_PM_##_field_##_MASK)

static const struct pm_status_row pm_fuse_rows[] = {
	PM_INFO_REGSET_ENTRY(fusectl0, ENABLE_PM),
	PM_INFO_REGSET_ENTRY(fusectl0, ENABLE_PM_IDLE),
	PM_INFO_REGSET_ENTRY(fusectl0, ENABLE_DEEP_PM_IDLE),
};

static const struct pm_status_row pm_info_rows[] = {
	PM_INFO_REGSET_ENTRY(pm.status, CPM_PM_STATE),
	PM_INFO_REGSET_ENTRY(pm.status, PENDING_WP),
	PM_INFO_REGSET_ENTRY(pm.status, CURRENT_WP),
	PM_INFO_REGSET_ENTRY(pm.fw_init, IDLE_ENABLE),
	PM_INFO_REGSET_ENTRY(pm.fw_init, IDLE_FILTER),
	PM_INFO_REGSET_ENTRY(pm.main, MIN_PWR_ACK),
	PM_INFO_REGSET_ENTRY(pm.thread, MIN_PWR_ACK_PENDING),
	PM_INFO_REGSET_ENTRY(pm.main, THR_VALUE),
};

static const struct pm_status_row pm_ssm_rows[] = {
	PM_INFO_REGSET_ENTRY(ssm.pm_enable, SSM_PM_ENABLE),
	PM_INFO_REGSET_ENTRY32(ssm.active_constraint, ACTIVE_CONSTRAINT),
	PM_INFO_REGSET_ENTRY(ssm.pm_domain_status, DOMAIN_POWER_GATED),
	PM_INFO_REGSET_ENTRY(ssm.pm_active_status, ATH_ACTIVE_COUNT),
	PM_INFO_REGSET_ENTRY(ssm.pm_active_status, CPH_ACTIVE_COUNT),
	PM_INFO_REGSET_ENTRY(ssm.pm_active_status, PKE_ACTIVE_COUNT),
	PM_INFO_REGSET_ENTRY(ssm.pm_active_status, CPR_ACTIVE_COUNT),
	PM_INFO_REGSET_ENTRY(ssm.pm_active_status, DCPR_ACTIVE_COUNT),
	PM_INFO_REGSET_ENTRY(ssm.pm_active_status, UCS_ACTIVE_COUNT),
	PM_INFO_REGSET_ENTRY(ssm.pm_active_status, XLT_ACTIVE_COUNT),
	PM_INFO_REGSET_ENTRY(ssm.pm_active_status, WAT_ACTIVE_COUNT),
	PM_INFO_REGSET_ENTRY(ssm.pm_active_status, WCP_ACTIVE_COUNT),
	PM_INFO_REGSET_ENTRY(ssm.pm_managed_status, ATH_MANAGED_COUNT),
	PM_INFO_REGSET_ENTRY(ssm.pm_managed_status, CPH_MANAGED_COUNT),
	PM_INFO_REGSET_ENTRY(ssm.pm_managed_status, PKE_MANAGED_COUNT),
	PM_INFO_REGSET_ENTRY(ssm.pm_managed_status, CPR_MANAGED_COUNT),
	PM_INFO_REGSET_ENTRY(ssm.pm_managed_status, DCPR_MANAGED_COUNT),
	PM_INFO_REGSET_ENTRY(ssm.pm_managed_status, UCS_MANAGED_COUNT),
	PM_INFO_REGSET_ENTRY(ssm.pm_managed_status, XLT_MANAGED_COUNT),
	PM_INFO_REGSET_ENTRY(ssm.pm_managed_status, WAT_MANAGED_COUNT),
	PM_INFO_REGSET_ENTRY(ssm.pm_managed_status, WCP_MANAGED_COUNT),
};

static const struct pm_status_row pm_log_rows[] = {
	PM_INFO_REGSET_ENTRY32(event_counters.host_msg, HOST_MSG_EVENT_COUNT),
	PM_INFO_REGSET_ENTRY32(event_counters.sys_pm, SYS_PM_EVENT_COUNT),
	PM_INFO_REGSET_ENTRY32(event_counters.local_ssm, SSM_EVENT_COUNT),
	PM_INFO_REGSET_ENTRY32(event_counters.timer, TIMER_EVENT_COUNT),
	PM_INFO_REGSET_ENTRY32(event_counters.unknown, UNKNOWN_EVENT_COUNT),
};

static const struct pm_status_row pm_event_rows[ICP_QAT_NUMBER_OF_PM_EVENTS] = {
	PM_INFO_REGSET_ENTRY32(event_log[0], EVENT0),
	PM_INFO_REGSET_ENTRY32(event_log[1], EVENT1),
	PM_INFO_REGSET_ENTRY32(event_log[2], EVENT2),
	PM_INFO_REGSET_ENTRY32(event_log[3], EVENT3),
	PM_INFO_REGSET_ENTRY32(event_log[4], EVENT4),
	PM_INFO_REGSET_ENTRY32(event_log[5], EVENT5),
	PM_INFO_REGSET_ENTRY32(event_log[6], EVENT6),
	PM_INFO_REGSET_ENTRY32(event_log[7], EVENT7),
};

static const struct pm_status_row pm_csrs_rows[] = {
	PM_INFO_REGSET_ENTRY32(pm.fw_init, CPM_PM_FW_INIT),
	PM_INFO_REGSET_ENTRY32(pm.status, CPM_PM_STATUS),
	PM_INFO_REGSET_ENTRY32(pm.main, CPM_PM_MASTER_FW),
	PM_INFO_REGSET_ENTRY32(pm.pwrreq, CPM_PM_PWRREQ),
};

static_assert(sizeof(struct icp_qat_fw_init_admin_pm_info) < PAGE_SIZE);

static ssize_t adf_gen4_print_pm_status(struct adf_accel_dev *accel_dev,
					char __user *buf, size_t count,
					loff_t *pos)
{
	void __iomem *pmisc = adf_get_pmisc_base(accel_dev);
	struct adf_pm *pm = &accel_dev->power_management;

Annotation

Implementation Notes