drivers/crypto/intel/qat/qat_common/adf_sysfs_rl.c
Source file repositories/reference/linux-study-clean/drivers/crypto/intel/qat/qat_common/adf_sysfs_rl.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/crypto/intel/qat/qat_common/adf_sysfs_rl.c- Extension
.c- Size
- 8695 bytes
- Lines
- 465
- Domain
- Driver Families
- Bucket
- drivers/crypto
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/dev_printk.hlinux/pci.hlinux/sysfs.hlinux/types.hadf_common_drv.hadf_rl.hadf_sysfs_rl.h
Detected Declarations
enum rl_opsenum rl_paramsfunction set_param_ufunction set_param_sfunction get_param_ufunction get_param_sfunction rp_showfunction rp_storefunction id_showfunction id_storefunction cir_showfunction cir_storefunction pir_showfunction pir_storefunction srv_showfunction srv_storefunction cap_rem_showfunction cap_rem_storefunction sla_op_storefunction adf_sysfs_rl_addfunction adf_sysfs_rl_rm
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-only
/* Copyright(c) 2023 Intel Corporation */
#define dev_fmt(fmt) "RateLimiting: " fmt
#include <linux/dev_printk.h>
#include <linux/pci.h>
#include <linux/sysfs.h>
#include <linux/types.h>
#include "adf_common_drv.h"
#include "adf_rl.h"
#include "adf_sysfs_rl.h"
#define GET_RL_STRUCT(accel_dev) ((accel_dev)->rate_limiting->user_input)
enum rl_ops {
ADD,
UPDATE,
RM,
RM_ALL,
GET,
};
enum rl_params {
RP_MASK,
ID,
CIR,
PIR,
SRV,
CAP_REM_SRV,
};
static const char *const rl_services[] = {
[SVC_ASYM] = "asym",
[SVC_SYM] = "sym",
[SVC_DC] = "dc",
[SVC_DECOMP] = "decomp",
};
static const char *const rl_operations[] = {
[ADD] = "add",
[UPDATE] = "update",
[RM] = "rm",
[RM_ALL] = "rm_all",
[GET] = "get",
};
static int set_param_u(struct device *dev, enum rl_params param, u64 set)
{
struct adf_rl_interface_data *data;
struct adf_accel_dev *accel_dev;
int ret = 0;
accel_dev = adf_devmgr_pci_to_accel_dev(to_pci_dev(dev));
if (!accel_dev)
return -EINVAL;
data = &GET_RL_STRUCT(accel_dev);
down_write(&data->lock);
switch (param) {
case RP_MASK:
data->input.rp_mask = set;
break;
case CIR:
data->input.cir = set;
break;
case PIR:
data->input.pir = set;
break;
case SRV:
data->input.srv = set;
break;
case CAP_REM_SRV:
data->cap_rem_srv = set;
break;
default:
ret = -EINVAL;
break;
}
up_write(&data->lock);
return ret;
}
static int set_param_s(struct device *dev, enum rl_params param, int set)
{
struct adf_rl_interface_data *data;
struct adf_accel_dev *accel_dev;
Annotation
- Immediate include surface: `linux/dev_printk.h`, `linux/pci.h`, `linux/sysfs.h`, `linux/types.h`, `adf_common_drv.h`, `adf_rl.h`, `adf_sysfs_rl.h`.
- Detected declarations: `enum rl_ops`, `enum rl_params`, `function set_param_u`, `function set_param_s`, `function get_param_u`, `function get_param_s`, `function rp_show`, `function rp_store`, `function id_show`, `function id_store`.
- Atlas domain: Driver Families / drivers/crypto.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.