drivers/crypto/intel/qat/qat_common/qat_asym_algs.c

File Facts

System

Linux kernel

Corpus path

drivers/crypto/intel/qat/qat_common/qat_asym_algs.c

Extension

.c

Size

34160 bytes

Lines

1362

Domain

Driver Families

Bucket

drivers/crypto

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
• Touches IRQ or DMA behavior; this matters for the representative real-device path.
• Allocates kernel memory; connect allocation flags and lifetime to context constraints.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• linux/module.h
• crypto/internal/rsa.h
• crypto/internal/akcipher.h
• crypto/akcipher.h
• crypto/kpp.h
• crypto/internal/kpp.h
• crypto/dh.h
• linux/dma-mapping.h
• linux/fips.h
• crypto/scatterwalk.h
• icp_qat_fw_pke.h
• adf_accel_devices.h
• qat_algs_send.h
• adf_transport.h
• adf_common_drv.h
• qat_crypto.h

Detected Declarations

• struct qat_rsa_input_params
• struct qat_rsa_output_params
• struct qat_rsa_ctx
• struct qat_dh_input_params
• struct qat_dh_output_params
• struct qat_dh_ctx
• struct qat_asym_request
• function qat_alg_send_asym_message
• function qat_dh_cb
• function qat_dh_fn_id
• function qat_dh_compute_value
• function qat_dh_generate_public_key
• function qat_dh_compute_shared_secret
• function qat_dh_check_params_length
• function qat_dh_set_params
• function qat_dh_clear_ctx
• function qat_dh_set_secret
• function qat_dh_max_size
• function qat_dh_init_tfm
• function qat_dh_exit_tfm
• function qat_rsa_cb
• function qat_alg_asym_callback
• function qat_rsa_enc_fn_id
• function qat_rsa_dec_fn_id
• function qat_rsa_dec_fn_id_crt
• function qat_rsa_enc
• function qat_rsa_dec
• function qat_rsa_set_n
• function qat_rsa_set_e
• function qat_rsa_set_d
• function qat_rsa_drop_leading_zeros
• function qat_rsa_setkey_crt
• function qat_rsa_clear_ctx
• function qat_rsa_setkey
• function qat_rsa_setpubkey
• function qat_rsa_setprivkey
• function qat_rsa_max_size
• function qat_rsa_init_tfm
• function qat_rsa_exit_tfm
• function qat_asym_algs_register
• function qat_asym_algs_unregister

Annotated Snippet

struct qat_rsa_input_params {
	union {
		struct {
			dma_addr_t m;
			dma_addr_t e;
			dma_addr_t n;
		} enc;
		struct {
			dma_addr_t c;
			dma_addr_t d;
			dma_addr_t n;
		} dec;
		struct {
			dma_addr_t c;
			dma_addr_t p;
			dma_addr_t q;
			dma_addr_t dp;
			dma_addr_t dq;
			dma_addr_t qinv;
		} dec_crt;
		u64 in_tab[8];
	};
} __packed __aligned(64);

struct qat_rsa_output_params {
	union {
		struct {
			dma_addr_t c;
		} enc;
		struct {
			dma_addr_t m;
		} dec;
		u64 out_tab[8];
	};
} __packed __aligned(64);

struct qat_rsa_ctx {
	char *n;
	char *e;
	char *d;
	char *p;
	char *q;
	char *dp;
	char *dq;
	char *qinv;
	dma_addr_t dma_n;
	dma_addr_t dma_e;
	dma_addr_t dma_d;
	dma_addr_t dma_p;
	dma_addr_t dma_q;
	dma_addr_t dma_dp;
	dma_addr_t dma_dq;
	dma_addr_t dma_qinv;
	unsigned int key_sz;
	bool crt_mode;
	struct qat_crypto_instance *inst;
} __packed __aligned(64);

struct qat_dh_input_params {
	union {
		struct {
			dma_addr_t b;
			dma_addr_t xa;
			dma_addr_t p;
		} in;
		struct {
			dma_addr_t xa;
			dma_addr_t p;
		} in_g2;
		u64 in_tab[8];
	};
} __packed __aligned(64);

struct qat_dh_output_params {
	union {
		dma_addr_t r;
		u64 out_tab[8];
	};
} __packed __aligned(64);

struct qat_dh_ctx {
	char *g;
	char *xa;
	char *p;
	dma_addr_t dma_g;
	dma_addr_t dma_xa;
	dma_addr_t dma_p;
	unsigned int p_size;
	bool g2;
	struct qat_crypto_instance *inst;

Annotation

• Immediate include surface: `linux/module.h`, `crypto/internal/rsa.h`, `crypto/internal/akcipher.h`, `crypto/akcipher.h`, `crypto/kpp.h`, `crypto/internal/kpp.h`, `crypto/dh.h`, `linux/dma-mapping.h`.
• Detected declarations: `struct qat_rsa_input_params`, `struct qat_rsa_output_params`, `struct qat_rsa_ctx`, `struct qat_dh_input_params`, `struct qat_dh_output_params`, `struct qat_dh_ctx`, `struct qat_asym_request`, `function qat_alg_send_asym_message`, `function qat_dh_cb`, `function qat_dh_fn_id`.
• Atlas domain: Driver Families / drivers/crypto.
• Implementation status: source implementation candidate.
• Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
• IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.