drivers/crypto/marvell/cesa/tdma.c
Source file repositories/reference/linux-study-clean/drivers/crypto/marvell/cesa/tdma.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/crypto/marvell/cesa/tdma.c- Extension
.c- Size
- 10440 bytes
- Lines
- 414
- Domain
- Driver Families
- Bucket
- drivers/crypto
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
cesa.h
Detected Declarations
function mv_cesa_req_dma_iter_next_transferfunction mv_cesa_dma_stepfunction mv_cesa_dma_cleanupfunction mv_cesa_dma_preparefunction mv_cesa_tdma_chainfunction mv_cesa_tdma_processfunction mv_cesa_dma_add_descfunction mv_cesa_dma_add_result_opfunction mv_cesa_dma_add_data_transferfunction mv_cesa_dma_add_dummy_launchfunction mv_cesa_dma_add_dummy_endfunction mv_cesa_dma_add_op_transfersfunction mv_cesa_sg_copy
Annotated Snippet
if (tdma->flags & CESA_TDMA_END_OF_REQ) {
struct crypto_async_request *backlog = NULL;
struct mv_cesa_ctx *ctx;
u32 current_status;
spin_lock_bh(&engine->lock);
/*
* if req is NULL, this means we're processing the
* request in engine->req.
*/
if (!req)
req = engine->req;
else
req = mv_cesa_dequeue_req_locked(engine,
&backlog);
/* Re-chaining to the next request */
engine->chain_hw.first = tdma->next;
tdma->next = NULL;
/* If this is the last request, clear the chain */
if (engine->chain_hw.first == NULL)
engine->chain_hw.last = NULL;
spin_unlock_bh(&engine->lock);
ctx = crypto_tfm_ctx(req->tfm);
current_status = (tdma->cur_dma == tdma_cur) ?
status : CESA_SA_INT_ACC0_IDMA_DONE;
res = ctx->ops->process(req, current_status);
ctx->ops->complete(req);
if (res == 0)
mv_cesa_engine_enqueue_complete_request(engine,
req);
if (backlog)
crypto_request_complete(backlog, -EINPROGRESS);
}
if (res || tdma->cur_dma == tdma_cur)
break;
}
/*
* Save the last request in error to engine->req, so that the core
* knows which request was faulty
*/
if (res) {
spin_lock_bh(&engine->lock);
engine->req = req;
spin_unlock_bh(&engine->lock);
}
return res;
}
static struct mv_cesa_tdma_desc *
mv_cesa_dma_add_desc(struct mv_cesa_tdma_chain *chain, gfp_t flags)
{
struct mv_cesa_tdma_desc *new_tdma = NULL;
dma_addr_t dma_handle;
new_tdma = dma_pool_zalloc(cesa_dev->dma->tdma_desc_pool, flags,
&dma_handle);
if (!new_tdma)
return ERR_PTR(-ENOMEM);
new_tdma->cur_dma = dma_handle;
if (chain->last) {
chain->last->next_dma = cpu_to_le32(dma_handle);
chain->last->next = new_tdma;
} else {
chain->first = new_tdma;
}
chain->last = new_tdma;
return new_tdma;
}
int mv_cesa_dma_add_result_op(struct mv_cesa_tdma_chain *chain, dma_addr_t src,
u32 size, u32 flags, gfp_t gfp_flags)
{
struct mv_cesa_tdma_desc *tdma, *op_desc;
tdma = mv_cesa_dma_add_desc(chain, gfp_flags);
if (IS_ERR(tdma))
return PTR_ERR(tdma);
/* We re-use an existing op_desc object to retrieve the context
Annotation
- Immediate include surface: `cesa.h`.
- Detected declarations: `function mv_cesa_req_dma_iter_next_transfer`, `function mv_cesa_dma_step`, `function mv_cesa_dma_cleanup`, `function mv_cesa_dma_prepare`, `function mv_cesa_tdma_chain`, `function mv_cesa_tdma_process`, `function mv_cesa_dma_add_desc`, `function mv_cesa_dma_add_result_op`, `function mv_cesa_dma_add_data_transfer`, `function mv_cesa_dma_add_dummy_launch`.
- Atlas domain: Driver Families / drivers/crypto.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.