drivers/crypto/marvell/octeontx/otx_cptpf_ucode.c
Source file repositories/reference/linux-study-clean/drivers/crypto/marvell/octeontx/otx_cptpf_ucode.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/crypto/marvell/octeontx/otx_cptpf_ucode.c- Extension
.c- Size
- 42324 bytes
- Lines
- 1684
- Domain
- Driver Families
- Bucket
- drivers/crypto
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/ctype.hlinux/firmware.hlinux/string.hlinux/string_choices.hotx_cpt_common.hotx_cptpf_ucode.hotx_cptpf.h
Detected Declarations
struct tar_hdr_tstruct tar_blk_tstruct tar_arch_info_tfunction get_cores_bmapfunction is_eng_typefunction dev_supports_eng_typefunction set_ucode_filenamefunction get_ucode_typefunction is_mem_zerofunction cpt_set_ucode_basefunction cpt_detach_and_disable_coresfunction for_each_set_bitfunction cpt_attach_and_enable_coresfunction process_tar_filefunction release_tar_archivefunction list_for_each_entry_safefunction list_for_each_entryfunction print_tar_dbg_infofunction otx_cpt_uc_supports_eng_typefunction print_ucode_infofunction print_engs_infofunction print_ucode_dbg_infofunction cpt_print_engines_maskfunction print_dbg_infofunction update_engines_avail_countfunction update_engines_offsetfunction release_enginesfunction do_reserve_enginesfunction check_engines_availabilityfunction reserve_enginesfunction eng_grp_info_showfunction create_sysfs_eng_grps_infofunction ucode_unloadfunction copy_ucode_to_dma_memfunction ucode_loadfunction enable_eng_grpfunction disable_eng_grpfunction setup_eng_grp_mirroringfunction remove_eng_grp_mirroringfunction update_requested_engsfunction eng_grp_update_masksfunction delete_engine_groupfunction validate_1_ucode_scenariofunction update_ucode_ptrsfunction create_engine_groupfunction ucode_load_storefunction otx_cpt_try_create_default_eng_grpsfunction dev_supports_eng_type
Annotated Snippet
struct tar_hdr_t {
char name[100];
char mode[8];
char uid[8];
char gid[8];
char size[12];
char mtime[12];
char chksum[8];
char typeflag;
char linkname[100];
char magic[6];
char version[2];
char uname[32];
char gname[32];
char devmajor[8];
char devminor[8];
char prefix[155];
};
struct tar_blk_t {
union {
struct tar_hdr_t hdr;
char block[TAR_BLOCK_LEN];
};
};
struct tar_arch_info_t {
struct list_head ucodes;
const struct firmware *fw;
};
static struct otx_cpt_bitmap get_cores_bmap(struct device *dev,
struct otx_cpt_eng_grp_info *eng_grp)
{
struct otx_cpt_bitmap bmap = { {0} };
bool found = false;
int i;
if (eng_grp->g->engs_num > OTX_CPT_MAX_ENGINES) {
dev_err(dev, "unsupported number of engines %d on octeontx\n",
eng_grp->g->engs_num);
return bmap;
}
for (i = 0; i < OTX_CPT_MAX_ETYPES_PER_GRP; i++) {
if (eng_grp->engs[i].type) {
bitmap_or(bmap.bits, bmap.bits,
eng_grp->engs[i].bmap,
eng_grp->g->engs_num);
bmap.size = eng_grp->g->engs_num;
found = true;
}
}
if (!found)
dev_err(dev, "No engines reserved for engine group %d\n",
eng_grp->idx);
return bmap;
}
static int is_eng_type(int val, int eng_type)
{
return val & (1 << eng_type);
}
static int dev_supports_eng_type(struct otx_cpt_eng_grps *eng_grps,
int eng_type)
{
return is_eng_type(eng_grps->eng_types_supported, eng_type);
}
static void set_ucode_filename(struct otx_cpt_ucode *ucode,
const char *filename)
{
strscpy(ucode->filename, filename, OTX_CPT_UCODE_NAME_LENGTH);
}
static char *get_eng_type_str(int eng_type)
{
char *str = "unknown";
switch (eng_type) {
case OTX_CPT_SE_TYPES:
str = "SE";
break;
case OTX_CPT_AE_TYPES:
str = "AE";
break;
}
Annotation
- Immediate include surface: `linux/ctype.h`, `linux/firmware.h`, `linux/string.h`, `linux/string_choices.h`, `otx_cpt_common.h`, `otx_cptpf_ucode.h`, `otx_cptpf.h`.
- Detected declarations: `struct tar_hdr_t`, `struct tar_blk_t`, `struct tar_arch_info_t`, `function get_cores_bmap`, `function is_eng_type`, `function dev_supports_eng_type`, `function set_ucode_filename`, `function get_ucode_type`, `function is_mem_zero`, `function cpt_set_ucode_base`.
- Atlas domain: Driver Families / drivers/crypto.
- Implementation status: integration implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.