drivers/crypto/marvell/octeontx/otx_cptvf_mbox.c
Source file repositories/reference/linux-study-clean/drivers/crypto/marvell/octeontx/otx_cptvf_mbox.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/crypto/marvell/octeontx/otx_cptvf_mbox.c- Extension
.c- Size
- 5216 bytes
- Lines
- 238
- Domain
- Driver Families
- Bucket
- drivers/crypto
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/delay.hotx_cptvf.h
Detected Declarations
function dump_mbox_msgfunction cptvf_send_msg_to_pffunction otx_cptvf_handle_mbox_intrfunction cptvf_send_msg_to_pf_timeoutfunction otx_cptvf_check_pf_readyfunction CPTfunction otx_cptvf_send_vf_to_grp_msgfunction otx_cptvf_send_vf_priority_msgfunction otx_cptvf_send_vf_upfunction otx_cptvf_send_vf_down
Annotated Snippet
if (!timeout) {
dev_err(&cptvf->pdev->dev,
"PF didn't ack to mbox msg %llx from VF%u\n",
mbx->msg, cptvf->vfid);
return -EBUSY;
}
}
return 0;
}
/*
* Checks if VF is able to comminicate with PF
* and also gets the CPT number this VF is associated to.
*/
int otx_cptvf_check_pf_ready(struct otx_cptvf *cptvf)
{
struct otx_cpt_mbox mbx = {};
mbx.msg = OTX_CPT_MSG_READY;
return cptvf_send_msg_to_pf_timeout(cptvf, &mbx);
}
/*
* Communicate VQs size to PF to program CPT(0)_PF_Q(0-15)_CTL of the VF.
* Must be ACKed.
*/
int otx_cptvf_send_vq_size_msg(struct otx_cptvf *cptvf)
{
struct otx_cpt_mbox mbx = {};
mbx.msg = OTX_CPT_MSG_QLEN;
mbx.data = cptvf->qsize;
return cptvf_send_msg_to_pf_timeout(cptvf, &mbx);
}
/*
* Communicate VF group required to PF and get the VQ binded to that group
*/
int otx_cptvf_send_vf_to_grp_msg(struct otx_cptvf *cptvf, int group)
{
struct otx_cpt_mbox mbx = {};
int ret;
mbx.msg = OTX_CPT_MSG_QBIND_GRP;
/* Convey group of the VF */
mbx.data = group;
ret = cptvf_send_msg_to_pf_timeout(cptvf, &mbx);
if (ret)
return ret;
cptvf->vfgrp = group;
return 0;
}
/*
* Communicate VF group required to PF and get the VQ binded to that group
*/
int otx_cptvf_send_vf_priority_msg(struct otx_cptvf *cptvf)
{
struct otx_cpt_mbox mbx = {};
mbx.msg = OTX_CPT_MSG_VQ_PRIORITY;
/* Convey group of the VF */
mbx.data = cptvf->priority;
return cptvf_send_msg_to_pf_timeout(cptvf, &mbx);
}
/*
* Communicate to PF that VF is UP and running
*/
int otx_cptvf_send_vf_up(struct otx_cptvf *cptvf)
{
struct otx_cpt_mbox mbx = {};
mbx.msg = OTX_CPT_MSG_VF_UP;
return cptvf_send_msg_to_pf_timeout(cptvf, &mbx);
}
/*
* Communicate to PF that VF is DOWN and running
*/
int otx_cptvf_send_vf_down(struct otx_cptvf *cptvf)
{
struct otx_cpt_mbox mbx = {};
mbx.msg = OTX_CPT_MSG_VF_DOWN;
Annotation
- Immediate include surface: `linux/delay.h`, `otx_cptvf.h`.
- Detected declarations: `function dump_mbox_msg`, `function cptvf_send_msg_to_pf`, `function otx_cptvf_handle_mbox_intr`, `function cptvf_send_msg_to_pf_timeout`, `function otx_cptvf_check_pf_ready`, `function CPT`, `function otx_cptvf_send_vf_to_grp_msg`, `function otx_cptvf_send_vf_priority_msg`, `function otx_cptvf_send_vf_up`, `function otx_cptvf_send_vf_down`.
- Atlas domain: Driver Families / drivers/crypto.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.