drivers/crypto/marvell/octeontx/otx_cptvf_reqmgr.h
Source file repositories/reference/linux-study-clean/drivers/crypto/marvell/octeontx/otx_cptvf_reqmgr.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/crypto/marvell/octeontx/otx_cptvf_reqmgr.h- Extension
.h- Size
- 5384 bytes
- Lines
- 228
- Domain
- Driver Families
- Bucket
- drivers/crypto
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/types.hlinux/crypto.hlinux/pci.hotx_cpt_hw_types.h
Detected Declarations
struct otx_cptvf_requeststruct otx_cpt_buf_ptrstruct otx_cpt_iq_cmdstruct otx_cpt_sglist_componentstruct otx_cpt_pending_entrystruct otx_cpt_pending_queuestruct otx_cpt_req_infostruct otx_cpt_info_bufferstruct otx_cptvf_wqefunction do_request_cleanup
Annotated Snippet
struct otx_cptvf_request {
u32 param1;
u32 param2;
u16 dlen;
union otx_cpt_opcode_info opcode;
};
struct otx_cpt_buf_ptr {
u8 *vptr;
dma_addr_t dma_addr;
u16 size;
};
union otx_cpt_ctrl_info {
u32 flags;
struct {
#if defined(__BIG_ENDIAN_BITFIELD)
u32 reserved0:26;
u32 grp:3; /* Group bits */
u32 dma_mode:2; /* DMA mode */
u32 se_req:1; /* To SE core */
#else
u32 se_req:1; /* To SE core */
u32 dma_mode:2; /* DMA mode */
u32 grp:3; /* Group bits */
u32 reserved0:26;
#endif
} s;
};
/*
* CPT_INST_S software command definitions
* Words EI (0-3)
*/
union otx_cpt_iq_cmd_word0 {
u64 u64;
struct {
__be16 opcode;
__be16 param1;
__be16 param2;
__be16 dlen;
} s;
};
union otx_cpt_iq_cmd_word3 {
u64 u64;
struct {
#if defined(__BIG_ENDIAN_BITFIELD)
u64 grp:3;
u64 cptr:61;
#else
u64 cptr:61;
u64 grp:3;
#endif
} s;
};
struct otx_cpt_iq_cmd {
union otx_cpt_iq_cmd_word0 cmd;
u64 dptr;
u64 rptr;
union otx_cpt_iq_cmd_word3 cptr;
};
struct otx_cpt_sglist_component {
union {
u64 len;
struct {
__be16 len0;
__be16 len1;
__be16 len2;
__be16 len3;
} s;
} u;
__be64 ptr0;
__be64 ptr1;
__be64 ptr2;
__be64 ptr3;
};
struct otx_cpt_pending_entry {
u64 *completion_addr; /* Completion address */
struct otx_cpt_info_buffer *info;
/* Kernel async request callback */
void (*callback)(int status, void *arg1, void *arg2);
struct crypto_async_request *areq; /* Async request callback arg */
u8 resume_sender; /* Notify sender to resume sending requests */
u8 busy; /* Entry status (free/busy) */
};
Annotation
- Immediate include surface: `linux/types.h`, `linux/crypto.h`, `linux/pci.h`, `otx_cpt_hw_types.h`.
- Detected declarations: `struct otx_cptvf_request`, `struct otx_cpt_buf_ptr`, `struct otx_cpt_iq_cmd`, `struct otx_cpt_sglist_component`, `struct otx_cpt_pending_entry`, `struct otx_cpt_pending_queue`, `struct otx_cpt_req_info`, `struct otx_cpt_info_buffer`, `struct otx_cptvf_wqe`, `function do_request_cleanup`.
- Atlas domain: Driver Families / drivers/crypto.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.