drivers/crypto/marvell/octeontx2/cn10k_cpt.c

Source file repositories/reference/linux-study-clean/drivers/crypto/marvell/octeontx2/cn10k_cpt.c

File Facts

System
Linux kernel
Corpus path
drivers/crypto/marvell/octeontx2/cn10k_cpt.c
Extension
.c
Size
5998 bytes
Lines
224
Domain
Driver Families
Bucket
drivers/crypto
Inferred role
Driver Families: exported/initcall integration point
Status
integration implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-only
/* Copyright (C) 2021 Marvell. */

#include <linux/soc/marvell/octeontx2/asm.h>
#include "otx2_cptpf.h"
#include "otx2_cptvf.h"
#include "otx2_cptlf.h"
#include "cn10k_cpt.h"
#include "otx2_cpt_common.h"

static void cn10k_cpt_send_cmd(union otx2_cpt_inst_s *cptinst, u32 insts_num,
			       struct otx2_cptlf_info *lf);

static struct cpt_hw_ops otx2_hw_ops = {
	.send_cmd = otx2_cpt_send_cmd,
	.cpt_get_compcode = otx2_cpt_get_compcode,
	.cpt_get_uc_compcode = otx2_cpt_get_uc_compcode,
	.cpt_sg_info_create = otx2_sg_info_create,
};

static struct cpt_hw_ops cn10k_hw_ops = {
	.send_cmd = cn10k_cpt_send_cmd,
	.cpt_get_compcode = cn10k_cpt_get_compcode,
	.cpt_get_uc_compcode = cn10k_cpt_get_uc_compcode,
	.cpt_sg_info_create = otx2_sg_info_create,
};

static void cn10k_cpt_send_cmd(union otx2_cpt_inst_s *cptinst, u32 insts_num,
			       struct otx2_cptlf_info *lf)
{
	void *lmtline = lf->lfs->lmt_info.base + (lf->slot * LMTLINE_SIZE);
	u64 val = (lf->slot & 0x7FF);
	u64 tar_addr = 0;

	/* tar_addr<6:4> = Size of first LMTST - 1 in units of 128b. */
	tar_addr |= (__force u64)lf->ioreg |
		    (((OTX2_CPT_INST_SIZE/16) - 1) & 0x7) << 4;
	/*
	 * Make sure memory areas pointed in CPT_INST_S
	 * are flushed before the instruction is sent to CPT
	 */
	dma_wmb();

	/* Copy CPT command to LMTLINE */
	memcpy(lmtline, cptinst, insts_num * OTX2_CPT_INST_SIZE);
	cn10k_lmt_flush(val, tar_addr);
}

void cn10k_cpt_lmtst_free(struct pci_dev *pdev, struct otx2_cptlfs_info *lfs)
{
	struct otx2_lmt_info *lmt_info = &lfs->lmt_info;

	if (!lmt_info->base)
		return;

	dma_free_attrs(&pdev->dev, lmt_info->size,
		       lmt_info->base - lmt_info->align,
		       lmt_info->iova - lmt_info->align,
		       DMA_ATTR_FORCE_CONTIGUOUS);
}
EXPORT_SYMBOL_NS_GPL(cn10k_cpt_lmtst_free, "CRYPTO_DEV_OCTEONTX2_CPT");

static int cn10k_cpt_lmtst_alloc(struct pci_dev *pdev,
				 struct otx2_cptlfs_info *lfs, u32 size)
{
	struct otx2_lmt_info *lmt_info = &lfs->lmt_info;
	dma_addr_t align_iova;
	dma_addr_t iova;

	lmt_info->base = dma_alloc_attrs(&pdev->dev, size, &iova, GFP_KERNEL,
					 DMA_ATTR_FORCE_CONTIGUOUS);
	if (!lmt_info->base)
		return -ENOMEM;

	align_iova = ALIGN((u64)iova, LMTLINE_ALIGN);
	lmt_info->iova = align_iova;
	lmt_info->align = align_iova - iova;
	lmt_info->size = size;
	lmt_info->base += lmt_info->align;
	return 0;
}

int cn10k_cptpf_lmtst_init(struct otx2_cptpf_dev *cptpf)
{
	struct pci_dev *pdev = cptpf->pdev;
	u32 size;
	int ret;

	if (!test_bit(CN10K_LMTST, &cptpf->cap_flag)) {
		cptpf->lfs.ops = &otx2_hw_ops;

Annotation

Implementation Notes