drivers/crypto/marvell/octeontx2/otx2_cpt_mbox_common.c
Source file repositories/reference/linux-study-clean/drivers/crypto/marvell/octeontx2/otx2_cpt_mbox_common.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/crypto/marvell/octeontx2/otx2_cpt_mbox_common.c- Extension
.c- Size
- 7112 bytes
- Lines
- 283
- Domain
- Driver Families
- Bucket
- drivers/crypto
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
otx2_cpt_common.hotx2_cptlf.h
Detected Declarations
function otx2_cpt_send_mbox_msgfunction otx2_cpt_send_ready_msgfunction otx2_cpt_send_af_reg_requestsfunction otx2_cpt_add_read_af_regfunction otx2_cpt_add_write_af_regfunction otx2_cpt_read_af_regfunction otx2_cpt_write_af_regfunction otx2_cpt_attach_rscrs_msgfunction otx2_cpt_detach_rsrcs_msgfunction otx2_cpt_msix_offset_msgfunction otx2_cpt_sync_mbox_msgfunction otx2_cpt_lf_reset_msgfunction otx2_cpt_lmtst_tbl_setup_msg
Annotated Snippet
if (lfs->lf[i].msix_offset == MSIX_VECTOR_INVALID) {
dev_err(&pdev->dev,
"Invalid msix offset %d for LF %d\n",
lfs->lf[i].msix_offset, i);
return -EINVAL;
}
}
return ret;
}
EXPORT_SYMBOL_NS_GPL(otx2_cpt_msix_offset_msg, "CRYPTO_DEV_OCTEONTX2_CPT");
int otx2_cpt_sync_mbox_msg(struct otx2_mbox *mbox)
{
int err;
if (!otx2_mbox_nonempty(mbox, 0))
return 0;
otx2_mbox_msg_send(mbox, 0);
err = otx2_mbox_wait_for_rsp(mbox, 0);
if (err)
return err;
return otx2_mbox_check_rsp_msgs(mbox, 0);
}
EXPORT_SYMBOL_NS_GPL(otx2_cpt_sync_mbox_msg, "CRYPTO_DEV_OCTEONTX2_CPT");
int otx2_cpt_lf_reset_msg(struct otx2_cptlfs_info *lfs, int slot)
{
struct otx2_mbox *mbox = lfs->mbox;
struct pci_dev *pdev = lfs->pdev;
struct cpt_lf_rst_req *req;
int ret;
req = (struct cpt_lf_rst_req *)otx2_mbox_alloc_msg_rsp(mbox, 0, sizeof(*req),
sizeof(struct msg_rsp));
if (!req) {
dev_err(&pdev->dev, "RVU MBOX failed to get message.\n");
return -EFAULT;
}
req->hdr.id = MBOX_MSG_CPT_LF_RESET;
req->hdr.sig = OTX2_MBOX_REQ_SIG;
req->hdr.pcifunc = 0;
req->slot = slot;
ret = otx2_cpt_send_mbox_msg(mbox, pdev);
if (ret)
return ret;
return ret;
}
EXPORT_SYMBOL_NS_GPL(otx2_cpt_lf_reset_msg, "CRYPTO_DEV_OCTEONTX2_CPT");
int otx2_cpt_lmtst_tbl_setup_msg(struct otx2_cptlfs_info *lfs)
{
struct otx2_mbox *mbox = lfs->mbox;
struct pci_dev *pdev = lfs->pdev;
struct lmtst_tbl_setup_req *req;
req = (struct lmtst_tbl_setup_req *)
otx2_mbox_alloc_msg_rsp(mbox, 0, sizeof(*req),
sizeof(struct msg_rsp));
if (!req) {
dev_err(&pdev->dev, "RVU MBOX failed to alloc message.\n");
return -EFAULT;
}
req->hdr.id = MBOX_MSG_LMTST_TBL_SETUP;
req->hdr.sig = OTX2_MBOX_REQ_SIG;
req->hdr.pcifunc = 0;
req->use_local_lmt_region = true;
req->lmt_iova = lfs->lmt_info.iova;
return otx2_cpt_send_mbox_msg(mbox, pdev);
}
EXPORT_SYMBOL_NS_GPL(otx2_cpt_lmtst_tbl_setup_msg, "CRYPTO_DEV_OCTEONTX2_CPT");
Annotation
- Immediate include surface: `otx2_cpt_common.h`, `otx2_cptlf.h`.
- Detected declarations: `function otx2_cpt_send_mbox_msg`, `function otx2_cpt_send_ready_msg`, `function otx2_cpt_send_af_reg_requests`, `function otx2_cpt_add_read_af_reg`, `function otx2_cpt_add_write_af_reg`, `function otx2_cpt_read_af_reg`, `function otx2_cpt_write_af_reg`, `function otx2_cpt_attach_rscrs_msg`, `function otx2_cpt_detach_rsrcs_msg`, `function otx2_cpt_msix_offset_msg`.
- Atlas domain: Driver Families / drivers/crypto.
- Implementation status: integration implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.