drivers/crypto/marvell/octeontx2/otx2_cptvf_reqmgr.c

Source file repositories/reference/linux-study-clean/drivers/crypto/marvell/octeontx2/otx2_cptvf_reqmgr.c

File Facts

System
Linux kernel
Corpus path
drivers/crypto/marvell/octeontx2/otx2_cptvf_reqmgr.c
Extension
.c
Size
11212 bytes
Lines
410
Domain
Driver Families
Bucket
drivers/crypto
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

else if (info->extra_time < CPT_TIME_IN_RESET_COUNT) {
			info->time_in = jiffies;
			info->extra_time++;
		}
		return 1;

	case OTX2_CPT_COMP_E_GOOD:
	case OTX2_CPT_COMP_E_WARN:
		/*
		 * Check microcode completion code, it is only valid
		 * when completion code is CPT_COMP_E::GOOD
		 */
		if (uc_ccode != OTX2_CPT_UCC_SUCCESS) {
			/*
			 * If requested hmac is truncated and ucode returns
			 * s/g write length error then we report success
			 * because ucode writes as many bytes of calculated
			 * hmac as available in gather buffer and reports
			 * s/g write length error if number of bytes in gather
			 * buffer is less than full hmac size.
			 */
			if (info->req->is_trunc_hmac &&
			    uc_ccode == OTX2_CPT_UCC_SG_WRITE_LENGTH) {
				*res_code = 0;
				break;
			}

			pr_debug("Request failed with software error code 0x%x: algo = %s driver = %s\n",
				 cpt_status->s.uc_compcode,
				 info->req->areq->tfm->__crt_alg->cra_name,
				 info->req->areq->tfm->__crt_alg->cra_driver_name);
			otx2_cpt_dump_sg_list(pdev, info->req);
			break;
		}
		/* Request has been processed with success */
		*res_code = 0;
		break;

	default:
		dev_err(&pdev->dev,
			"Request returned invalid status %d\n", ccode);
		break;
	}
	return 0;
}

static inline void process_pending_queue(struct otx2_cptlfs_info *lfs,
					 struct otx2_cpt_pending_queue *pqueue)
{
	struct otx2_cpt_pending_entry *resume_pentry = NULL;
	void (*callback)(int status, void *arg, void *req);
	struct otx2_cpt_pending_entry *pentry = NULL;
	union otx2_cpt_res_s *cpt_status = NULL;
	struct otx2_cpt_inst_info *info = NULL;
	struct otx2_cpt_req_info *req = NULL;
	struct crypto_async_request *areq;
	struct pci_dev *pdev = lfs->pdev;
	u32 res_code, resume_index;

	while (1) {
		spin_lock_bh(&pqueue->lock);
		pentry = &pqueue->head[pqueue->front];

		if (WARN_ON(!pentry)) {
			spin_unlock_bh(&pqueue->lock);
			break;
		}

		res_code = -EINVAL;
		if (unlikely(!pentry->busy)) {
			spin_unlock_bh(&pqueue->lock);
			break;
		}

		if (unlikely(!pentry->callback)) {
			dev_err(&pdev->dev, "Callback NULL\n");
			goto process_pentry;
		}

		info = pentry->info;
		if (unlikely(!info)) {
			dev_err(&pdev->dev, "Pending entry post arg NULL\n");
			goto process_pentry;
		}

		req = info->req;
		if (unlikely(!req)) {
			dev_err(&pdev->dev, "Request NULL\n");
			goto process_pentry;
		}

Annotation

Implementation Notes