drivers/crypto/omap-sham.c
Source file repositories/reference/linux-study-clean/drivers/crypto/omap-sham.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/crypto/omap-sham.c- Extension
.c- Size
- 54833 bytes
- Lines
- 2227
- Domain
- Driver Families
- Bucket
- drivers/crypto
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
crypto/engine.hcrypto/hmac.hcrypto/internal/hash.hcrypto/scatterwalk.hcrypto/sha1.hcrypto/sha2.hlinux/err.hlinux/device.hlinux/dma-mapping.hlinux/dmaengine.hlinux/init.hlinux/interrupt.hlinux/io.hlinux/irq.hlinux/kernel.hlinux/module.hlinux/of.hlinux/of_address.hlinux/of_irq.hlinux/platform_device.hlinux/pm_runtime.hlinux/scatterlist.hlinux/slab.hlinux/string.hlinux/sysfs.hlinux/workqueue.h
Detected Declarations
struct omap_sham_devstruct omap_sham_reqctxstruct omap_sham_hmac_ctxstruct omap_sham_ctxstruct omap_sham_algs_infostruct omap_sham_pdatastruct omap_sham_devstruct omap_sham_drvfunction omap_sham_readfunction omap_sham_writefunction omap_sham_write_maskfunction omap_sham_waitfunction omap_sham_copy_hash_omap2function omap_sham_copy_hash_omap4function omap_sham_copy_ready_hashfunction omap_sham_write_ctrl_omap2function omap_sham_trigger_omap2function get_block_sizefunction omap_sham_write_nfunction omap_sham_write_ctrl_omap4function omap_sham_trigger_omap4function omap_sham_poll_irq_omap4function omap_sham_xmit_cpufunction omap_sham_dma_callbackfunction omap_sham_xmit_dmafunction omap_sham_copy_sg_listsfunction omap_sham_copy_sgsfunction omap_sham_align_sgsfunction omap_sham_prepare_requestfunction omap_sham_update_dma_stopfunction omap_sham_initfunction omap_sham_update_reqfunction omap_sham_final_reqfunction omap_sham_hash_one_reqfunction omap_sham_finish_hmacfunction omap_sham_finishfunction omap_sham_finish_reqfunction omap_sham_handle_queuefunction omap_sham_enqueuefunction omap_sham_updatefunction omap_sham_final_shashfunction omap_sham_finalfunction omap_sham_finupfunction omap_sham_digestfunction omap_sham_setkeyfunction omap_sham_cra_init_algfunction omap_sham_cra_initfunction omap_sham_cra_sha1_init
Annotated Snippet
struct omap_sham_reqctx {
struct omap_sham_dev *dd;
unsigned long flags;
u8 op;
u8 digest[SHA512_DIGEST_SIZE] OMAP_ALIGNED;
size_t digcnt;
size_t bufcnt;
/* walk state */
struct scatterlist *sg;
struct scatterlist sgl[2];
int offset; /* offset in current sg */
int sg_len;
unsigned int total; /* total request */
u8 buffer[BUFLEN] OMAP_ALIGNED;
};
struct omap_sham_hmac_ctx {
struct crypto_shash *shash;
u8 ipad[SHA512_BLOCK_SIZE] OMAP_ALIGNED;
u8 opad[SHA512_BLOCK_SIZE] OMAP_ALIGNED;
};
struct omap_sham_ctx {
unsigned long flags;
/* fallback stuff */
struct crypto_shash *fallback;
struct omap_sham_hmac_ctx base[];
};
#define OMAP_SHAM_QUEUE_LENGTH 10
struct omap_sham_algs_info {
struct ahash_engine_alg *algs_list;
unsigned int size;
unsigned int registered;
};
struct omap_sham_pdata {
struct omap_sham_algs_info *algs_info;
unsigned int algs_info_size;
unsigned long flags;
int digest_size;
void (*copy_hash)(struct ahash_request *req, int out);
void (*write_ctrl)(struct omap_sham_dev *dd, size_t length,
int final, int dma);
void (*trigger)(struct omap_sham_dev *dd, size_t length);
int (*poll_irq)(struct omap_sham_dev *dd);
irqreturn_t (*intr_hdlr)(int irq, void *dev_id);
u32 odigest_ofs;
u32 idigest_ofs;
u32 din_ofs;
u32 digcnt_ofs;
u32 rev_ofs;
u32 mask_ofs;
u32 sysstatus_ofs;
u32 mode_ofs;
u32 length_ofs;
u32 major_mask;
u32 major_shift;
u32 minor_mask;
u32 minor_shift;
};
struct omap_sham_dev {
struct list_head list;
unsigned long phys_base;
struct device *dev;
void __iomem *io_base;
int irq;
int err;
struct dma_chan *dma_lch;
struct work_struct done_task;
u8 polling_mode;
u8 xmit_buf[BUFLEN] OMAP_ALIGNED;
unsigned long flags;
int fallback_sz;
struct crypto_queue queue;
struct ahash_request *req;
struct crypto_engine *engine;
const struct omap_sham_pdata *pdata;
Annotation
- Immediate include surface: `crypto/engine.h`, `crypto/hmac.h`, `crypto/internal/hash.h`, `crypto/scatterwalk.h`, `crypto/sha1.h`, `crypto/sha2.h`, `linux/err.h`, `linux/device.h`.
- Detected declarations: `struct omap_sham_dev`, `struct omap_sham_reqctx`, `struct omap_sham_hmac_ctx`, `struct omap_sham_ctx`, `struct omap_sham_algs_info`, `struct omap_sham_pdata`, `struct omap_sham_dev`, `struct omap_sham_drv`, `function omap_sham_read`, `function omap_sham_write`.
- Atlas domain: Driver Families / drivers/crypto.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.