drivers/crypto/s5p-sss.c
Source file repositories/reference/linux-study-clean/drivers/crypto/s5p-sss.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/crypto/s5p-sss.c- Extension
.c- Size
- 59852 bytes
- Lines
- 2326
- Domain
- Driver Families
- Bucket
- drivers/crypto
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
crypto/aes.hcrypto/ctr.hcrypto/internal/hash.hcrypto/internal/skcipher.hcrypto/md5.hcrypto/scatterwalk.hcrypto/sha1.hcrypto/sha2.hlinux/clk.hlinux/dma-mapping.hlinux/err.hlinux/init.hlinux/interrupt.hlinux/io.hlinux/kernel.hlinux/module.hlinux/of.hlinux/platform_device.hlinux/scatterlist.hlinux/slab.hlinux/spinlock.hlinux/string.h
Detected Declarations
struct samsung_aes_variantstruct s5p_aes_reqctxstruct s5p_aes_ctxstruct s5p_aes_devstruct s5p_hash_reqctxstruct s5p_hash_ctxfunction s5p_set_dma_indatafunction s5p_set_dma_outdatafunction s5p_free_sg_cpyfunction s5p_sg_donefunction s5p_aes_completefunction s5p_unset_outdatafunction s5p_unset_indatafunction s5p_make_sg_cpyfunction s5p_set_outdatafunction s5p_set_indatafunction devicefunction devicefunction s5p_hash_readfunction s5p_hash_writefunction s5p_set_dma_hashdatafunction s5p_hash_rxfunction s5p_aes_interruptfunction s5p_hash_read_msgfunction s5p_hash_write_ctx_ivfunction s5p_hash_write_ivfunction s5p_hash_copy_resultfunction s5p_hash_dma_flushfunction s5p_hash_dma_enablefunction s5p_hash_irq_disablefunction s5p_hash_irq_enablefunction s5p_hash_set_flowfunction s5p_ahash_dma_initfunction s5p_hash_write_ctrlfunction s5p_hash_xmit_dmafunction s5p_hash_copy_sgsfunction s5p_hash_copy_sg_listsfunction s5p_hash_prepare_sgsfunction s5p_hash_prepare_requestfunction s5p_hash_update_dma_stopfunction s5p_hash_finishfunction s5p_hash_finish_reqfunction s5p_hash_handle_queuefunction s5p_hash_tasklet_cbfunction s5p_hash_enqueuefunction s5p_hash_updatefunction s5p_hash_finalfunction s5p_hash_finup
Annotated Snippet
struct samsung_aes_variant {
unsigned int aes_offset;
unsigned int hash_offset;
const char *clk_names[2];
};
struct s5p_aes_reqctx {
unsigned long mode;
};
struct s5p_aes_ctx {
struct s5p_aes_dev *dev;
u8 aes_key[AES_MAX_KEY_SIZE];
u8 nonce[CTR_RFC3686_NONCE_SIZE];
int keylen;
};
/**
* struct s5p_aes_dev - Crypto device state container
* @dev: Associated device
* @clk: Clock for accessing hardware
* @pclk: APB bus clock necessary to access the hardware
* @ioaddr: Mapped IO memory region
* @aes_ioaddr: Per-varian offset for AES block IO memory
* @irq_fc: Feed control interrupt line
* @req: Crypto request currently handled by the device
* @ctx: Configuration for currently handled crypto request
* @sg_src: Scatter list with source data for currently handled block
* in device. This is DMA-mapped into device.
* @sg_dst: Scatter list with destination data for currently handled block
* in device. This is DMA-mapped into device.
* @sg_src_cpy: In case of unaligned access, copied scatter list
* with source data.
* @sg_dst_cpy: In case of unaligned access, copied scatter list
* with destination data.
* @tasklet: New request scheduling jib
* @queue: Crypto queue
* @busy: Indicates whether the device is currently handling some request
* thus it uses some of the fields from this state, like:
* req, ctx, sg_src/dst (and copies). This essentially
* protects against concurrent access to these fields.
* @lock: Lock for protecting both access to device hardware registers
* and fields related to current request (including the busy field).
* @res: Resources for hash.
* @io_hash_base: Per-variant offset for HASH block IO memory.
* @hash_lock: Lock for protecting hash_req, hash_queue and hash_flags
* variable.
* @hash_flags: Flags for current HASH op.
* @hash_queue: Async hash queue.
* @hash_tasklet: New HASH request scheduling job.
* @xmit_buf: Buffer for current HASH request transfer into SSS block.
* @hash_req: Current request sending to SSS HASH block.
* @hash_sg_iter: Scatterlist transferred through DMA into SSS HASH block.
* @hash_sg_cnt: Counter for hash_sg_iter.
*
* @use_hash: true if HASH algs enabled
*/
struct s5p_aes_dev {
struct device *dev;
struct clk *clk;
struct clk *pclk;
void __iomem *ioaddr;
void __iomem *aes_ioaddr;
int irq_fc;
struct skcipher_request *req;
struct s5p_aes_ctx *ctx;
struct scatterlist *sg_src;
struct scatterlist *sg_dst;
struct scatterlist *sg_src_cpy;
struct scatterlist *sg_dst_cpy;
struct tasklet_struct tasklet;
struct crypto_queue queue;
bool busy;
spinlock_t lock;
struct resource *res;
void __iomem *io_hash_base;
spinlock_t hash_lock; /* protect hash_ vars */
unsigned long hash_flags;
struct crypto_queue hash_queue;
struct tasklet_struct hash_tasklet;
u8 xmit_buf[BUFLEN];
struct ahash_request *hash_req;
struct scatterlist *hash_sg_iter;
Annotation
- Immediate include surface: `crypto/aes.h`, `crypto/ctr.h`, `crypto/internal/hash.h`, `crypto/internal/skcipher.h`, `crypto/md5.h`, `crypto/scatterwalk.h`, `crypto/sha1.h`, `crypto/sha2.h`.
- Detected declarations: `struct samsung_aes_variant`, `struct s5p_aes_reqctx`, `struct s5p_aes_ctx`, `struct s5p_aes_dev`, `struct s5p_hash_reqctx`, `struct s5p_hash_ctx`, `function s5p_set_dma_indata`, `function s5p_set_dma_outdata`, `function s5p_free_sg_cpy`, `function s5p_sg_done`.
- Atlas domain: Driver Families / drivers/crypto.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.