drivers/cxl/core/pci.c
Source file repositories/reference/linux-study-clean/drivers/cxl/core/pci.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/cxl/core/pci.c- Extension
.c- Size
- 22842 bytes
- Lines
- 929
- Domain
- Driver Families
- Bucket
- drivers/cxl
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/units.hlinux/io-64-nonatomic-lo-hi.hlinux/device.hlinux/delay.hlinux/pci.hlinux/pci-doe.hlinux/aer.hcxlpci.hcxlmem.hcxl.hcore.htrace.h
Detected Declarations
struct cxl_walk_contextfunction pci_get_port_numfunction ERR_PTRfunction cxl_dvsec_mem_range_validfunction cxl_dvsec_mem_range_activefunction cxl_await_media_readyfunction cxl_set_mem_enablefunction clear_mem_enablefunction devm_cxl_enable_memfunction dvsec_range_allowedfunction disable_hdmfunction devm_cxl_enable_hdmfunction cxl_dvsec_rr_decodefunction cxl_hdm_decode_initfunction FIELD_PREPfunction cxl_cdat_read_tablefunction cdat_checksumfunction read_cdat_datafunction cxl_flit_sizefunction cxl_pci_get_latencyfunction __cxl_endpoint_decoder_reset_detectedfunction cxl_endpoint_decoder_reset_detectedfunction cxl_rcrb_get_comp_regsfunction cxl_pci_setup_regsfunction cxl_pci_get_bandwidthfunction cxl_gpf_get_dvsecfunction update_gpf_port_dvsecfunction cxl_gpf_port_setupfunction count_dportsfunction cxl_port_get_possible_dports
Annotated Snippet
struct cxl_walk_context {
struct pci_bus *bus;
struct cxl_port *port;
int type;
int error;
int count;
};
static int count_dports(struct pci_dev *pdev, void *data)
{
struct cxl_walk_context *ctx = data;
int type = pci_pcie_type(pdev);
if (pdev->bus != ctx->bus)
return 0;
if (!pci_is_pcie(pdev))
return 0;
if (type != ctx->type)
return 0;
ctx->count++;
return 0;
}
int cxl_port_get_possible_dports(struct cxl_port *port)
{
struct pci_bus *bus = cxl_port_to_pci_bus(port);
struct cxl_walk_context ctx;
int type;
if (!bus) {
dev_err(&port->dev, "No PCI bus found for port %s\n",
dev_name(&port->dev));
return -ENXIO;
}
if (pci_is_root_bus(bus))
type = PCI_EXP_TYPE_ROOT_PORT;
else
type = PCI_EXP_TYPE_DOWNSTREAM;
ctx = (struct cxl_walk_context) {
.bus = bus,
.type = type,
};
pci_walk_bus(bus, count_dports, &ctx);
return ctx.count;
}
Annotation
- Immediate include surface: `linux/units.h`, `linux/io-64-nonatomic-lo-hi.h`, `linux/device.h`, `linux/delay.h`, `linux/pci.h`, `linux/pci-doe.h`, `linux/aer.h`, `cxlpci.h`.
- Detected declarations: `struct cxl_walk_context`, `function pci_get_port_num`, `function ERR_PTR`, `function cxl_dvsec_mem_range_valid`, `function cxl_dvsec_mem_range_active`, `function cxl_await_media_ready`, `function cxl_set_mem_enable`, `function clear_mem_enable`, `function devm_cxl_enable_mem`, `function dvsec_range_allowed`.
- Atlas domain: Driver Families / drivers/cxl.
- Implementation status: integration implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.