drivers/cxl/cxl.h

Source file repositories/reference/linux-study-clean/drivers/cxl/cxl.h

File Facts

System
Linux kernel
Corpus path
drivers/cxl/cxl.h
Extension
.h
Size
32004 bytes
Lines
933
Domain
Driver Families
Bucket
drivers/cxl
Inferred role
Driver Families: operation-table or driver-model contract
Status
pattern implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

extern const struct bus_type cxl_bus_type;

/*
 * Note, add_dport() is expressly for the cxl_port driver. TODO: investigate a
 * type-safe driver model where probe()/remove() take the type of object implied
 * by @id and the add_dport() op only defined for the CXL_DEVICE_PORT driver
 * template.
 */
struct cxl_driver {
	const char *name;
	int (*probe)(struct device *dev);
	void (*remove)(struct device *dev);
	struct cxl_dport *(*add_dport)(struct cxl_port *port,
				       struct device *dport_dev);
	struct device_driver drv;
	int id;
};

#define to_cxl_drv(__drv)	container_of_const(__drv, struct cxl_driver, drv)

int __cxl_driver_register(struct cxl_driver *cxl_drv, struct module *owner,
			  const char *modname);
#define cxl_driver_register(x) __cxl_driver_register(x, THIS_MODULE, KBUILD_MODNAME)
void cxl_driver_unregister(struct cxl_driver *cxl_drv);

#define module_cxl_driver(__cxl_driver) \
	module_driver(__cxl_driver, cxl_driver_register, cxl_driver_unregister)

#define CXL_DEVICE_NVDIMM_BRIDGE	1
#define CXL_DEVICE_NVDIMM		2
#define CXL_DEVICE_PORT			3
#define CXL_DEVICE_ROOT			4
#define CXL_DEVICE_MEMORY_EXPANDER	5
#define CXL_DEVICE_REGION		6
#define CXL_DEVICE_PMEM_REGION		7
#define CXL_DEVICE_DAX_REGION		8
#define CXL_DEVICE_PMU			9

#define MODULE_ALIAS_CXL(type) MODULE_ALIAS("cxl:t" __stringify(type) "*")
#define CXL_MODALIAS_FMT "cxl:t%d"

struct cxl_nvdimm_bridge *to_cxl_nvdimm_bridge(struct device *dev);
struct cxl_nvdimm_bridge *devm_cxl_add_nvdimm_bridge(struct device *host,
						     struct cxl_port *port);
struct cxl_nvdimm_bridge *__devm_cxl_add_nvdimm_bridge(struct device *host,
						       struct cxl_port *port);
struct cxl_nvdimm *to_cxl_nvdimm(struct device *dev);
bool is_cxl_nvdimm(struct device *dev);
int devm_cxl_add_nvdimm(struct device *host, struct cxl_port *port,
			struct cxl_memdev *cxlmd);
struct cxl_nvdimm_bridge *cxl_find_nvdimm_bridge(struct cxl_port *port);

#ifdef CONFIG_CXL_REGION
bool is_cxl_pmem_region(struct device *dev);
struct cxl_pmem_region *to_cxl_pmem_region(struct device *dev);
int cxl_add_to_region(struct cxl_endpoint_decoder *cxled);
struct cxl_dax_region *to_cxl_dax_region(struct device *dev);
u64 cxl_port_get_spa_cache_alias(struct cxl_port *endpoint, u64 spa);
bool cxl_region_contains_resource(const struct resource *res);
#else
static inline bool is_cxl_pmem_region(struct device *dev)
{
	return false;
}
static inline struct cxl_pmem_region *to_cxl_pmem_region(struct device *dev)
{
	return NULL;
}
static inline int cxl_add_to_region(struct cxl_endpoint_decoder *cxled)
{
	return 0;
}
static inline struct cxl_dax_region *to_cxl_dax_region(struct device *dev)
{
	return NULL;
}
static inline u64 cxl_port_get_spa_cache_alias(struct cxl_port *endpoint,
					       u64 spa)
{
	return 0;
}
static inline bool cxl_region_contains_resource(const struct resource *res)
{
	return false;
}
#endif

void cxl_endpoint_parse_cdat(struct cxl_port *port);
void cxl_switch_parse_cdat(struct cxl_dport *dport);

Annotation

Implementation Notes