drivers/cxl/cxlmem.h
Source file repositories/reference/linux-study-clean/drivers/cxl/cxlmem.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/cxl/cxlmem.h- Extension
.h- Size
- 26814 bytes
- Lines
- 877
- Domain
- Driver Families
- Bucket
- drivers/cxl
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
uapi/linux/cxl_mem.hlinux/pci.hlinux/cdev.hlinux/uuid.hlinux/node.hcxl/event.hcxl/mailbox.hcxl.h
Detected Declarations
struct cxl_memdevstruct cxl_memdev_attachstruct cxl_attach_regionstruct cxl_memdev_statestruct cxl_dpa_infostruct cxl_dpa_part_infostruct cxl_mbox_cmd_rcstruct cxl_event_interrupt_policystruct cxl_event_statestruct cxl_poison_statestruct cxl_mbox_get_fw_infostruct cxl_mbox_transfer_fwstruct cxl_mbox_activate_fwstruct cxl_fw_statestruct cxl_security_statestruct cxl_memdev_statestruct cxl_mbox_get_supported_logsstruct cxl_gsl_entrystruct cxl_cel_entrystruct cxl_mbox_get_logstruct cxl_mbox_identifystruct cxl_get_event_payloadstruct cxl_mbox_clear_event_payloadstruct cxl_mbox_get_partition_infostruct cxl_mbox_get_lsastruct cxl_mbox_set_lsastruct cxl_mbox_set_partition_infostruct cxl_mbox_get_health_info_outstruct cxl_mbox_set_shutdown_state_instruct cxl_mbox_set_timestamp_instruct cxl_mbox_poison_instruct cxl_mbox_poison_outstruct cxl_poison_recordstruct cxl_mbox_inject_poisonstruct cxl_mbox_clear_poisonstruct cxl_mem_commandstruct cxl_set_passstruct cxl_disable_passstruct cxl_pass_erasestruct cxl_hdmstruct seq_fileenum cxl_event_int_modeenum poison_cmd_enabled_bitsenum security_cmd_enabled_bitsenum cxl_opcodeenum cxl_event_log_typefunction cxled_to_memdevfunction is_cxl_endpoint
Annotated Snippet
struct cxl_memdev {
struct device dev;
struct cdev cdev;
struct cxl_dev_state *cxlds;
struct work_struct detach_work;
struct cxl_nvdimm_bridge *cxl_nvb;
struct cxl_nvdimm *cxl_nvd;
struct cxl_port *endpoint;
const struct cxl_memdev_attach *attach;
int id;
int depth;
u8 scrub_cycle;
int scrub_region_id;
struct cxl_mem_err_rec *err_rec_array;
};
static inline struct cxl_memdev *to_cxl_memdev(struct device *dev)
{
return container_of(dev, struct cxl_memdev, dev);
}
static inline struct cxl_port *cxled_to_port(struct cxl_endpoint_decoder *cxled)
{
return to_cxl_port(cxled->cxld.dev.parent);
}
static inline struct cxl_port *cxlrd_to_port(struct cxl_root_decoder *cxlrd)
{
return to_cxl_port(cxlrd->cxlsd.cxld.dev.parent);
}
static inline struct cxl_memdev *
cxled_to_memdev(struct cxl_endpoint_decoder *cxled)
{
struct cxl_port *port = to_cxl_port(cxled->cxld.dev.parent);
return to_cxl_memdev(port->uport_dev);
}
bool is_cxl_memdev(const struct device *dev);
static inline bool is_cxl_endpoint(struct cxl_port *port)
{
return is_cxl_memdev(port->uport_dev);
}
struct cxl_memdev_attach {
int (*probe)(struct cxl_memdev *cxlmd);
};
/**
* struct cxl_attach_region - coordinate mapping a region at memdev registration
* @attach: common core attachment descriptor
* @hpa_range: physical address range of the region
*
* For the common simple case of a CXL device with private (non-general purpose
* / "accelerator") memory, enumerate firmware instantiated region, or
* instantiate a region for the device's capacity. Destroy the region on detach.
*/
struct cxl_attach_region {
struct cxl_memdev_attach attach;
struct range hpa_range;
};
#ifdef CONFIG_CXL_REGION
int cxl_memdev_attach_region(struct cxl_memdev *cxlmd);
#else
static inline int cxl_memdev_attach_region(struct cxl_memdev *cxlmd)
{
return -EOPNOTSUPP;
}
#endif
struct cxl_memdev *devm_cxl_add_classdev(struct cxl_dev_state *cxlds);
struct cxl_memdev *__devm_cxl_add_memdev(struct cxl_dev_state *cxlds,
const struct cxl_memdev_attach *attach);
int devm_cxl_sanitize_setup_notifier(struct device *host,
struct cxl_memdev *cxlmd);
struct cxl_memdev_state;
int devm_cxl_setup_fw_upload(struct device *host, struct cxl_memdev_state *mds);
int devm_cxl_dpa_reserve(struct cxl_endpoint_decoder *cxled,
resource_size_t base, resource_size_t len,
resource_size_t skipped);
struct cxl_dpa_info {
u64 size;
struct cxl_dpa_part_info {
struct range range;
enum cxl_partition_mode mode;
} part[CXL_NR_PARTITIONS_MAX];
int nr_partitions;
Annotation
- Immediate include surface: `uapi/linux/cxl_mem.h`, `linux/pci.h`, `linux/cdev.h`, `linux/uuid.h`, `linux/node.h`, `cxl/event.h`, `cxl/mailbox.h`, `cxl.h`.
- Detected declarations: `struct cxl_memdev`, `struct cxl_memdev_attach`, `struct cxl_attach_region`, `struct cxl_memdev_state`, `struct cxl_dpa_info`, `struct cxl_dpa_part_info`, `struct cxl_mbox_cmd_rc`, `struct cxl_event_interrupt_policy`, `struct cxl_event_state`, `struct cxl_poison_state`.
- Atlas domain: Driver Families / drivers/cxl.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.