drivers/cxl/pci.c
Source file repositories/reference/linux-study-clean/drivers/cxl/pci.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/cxl/pci.c- Extension
.c- Size
- 30791 bytes
- Lines
- 1095
- Domain
- Driver Families
- Bucket
- drivers/cxl
- Inferred role
- Driver Families: operation-table or driver-model contract
- Status
- pattern implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines an operation table; this is where Linux turns generic core objects into subsystem-specific behavior.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/unaligned.hlinux/io-64-nonatomic-lo-hi.hlinux/moduleparam.hlinux/module.hlinux/delay.hlinux/sizes.hlinux/mutex.hlinux/list.hlinux/pci.hlinux/aer.hlinux/io.hcxl/mailbox.hcxlmem.hcxlpci.hcxl.hpmu.h
Detected Declarations
struct cxl_dev_idfunction cxl_pci_mbox_wait_for_doorbellfunction cxl_request_irqfunction cxl_mbox_background_completefunction cxl_pci_mbox_irqfunction cxl_mbox_sanitize_workfunction __cxl_pci_mbox_send_cmdfunction orderfunction cxl_mbox_background_completefunction pollfunction cxl_pci_mbox_sendfunction cxl_pci_setup_mailboxfunction __cxl_pci_mbox_send_cmdfunction free_event_buffunction cxl_mem_alloc_event_buffunction cxl_alloc_irq_vectorsfunction cxl_event_threadfunction cxl_event_req_irqfunction cxl_event_get_int_policyfunction cxl_event_config_msgnumsfunction cxl_event_irqsetupfunction cxl_event_int_is_fwfunction cxl_event_configfunction cxl_pci_type3_init_mailboxfunction rcd_pcie_cap_emitfunction rcd_link_cap_showfunction rcd_link_ctrl_showfunction rcd_link_status_showfunction cxl_rcd_visiblefunction cxl_pci_probefunction cxl_slot_resetfunction cxl_error_resumefunction cxl_endpoint_decoder_clear_reset_flagsfunction cxl_reset_donefunction cxl_handle_cper_eventfunction cxl_cper_work_fnfunction cxl_pci_driver_initfunction cxl_pci_driver_exitmodule init cxl_pci_driver_init
Annotated Snippet
static struct pci_driver cxl_pci_driver = {
.name = KBUILD_MODNAME,
.id_table = cxl_mem_pci_tbl,
.probe = cxl_pci_probe,
.err_handler = &cxl_error_handlers,
.dev_groups = cxl_rcd_groups,
.driver = {
.probe_type = PROBE_PREFER_ASYNCHRONOUS,
},
};
#define CXL_EVENT_HDR_FLAGS_REC_SEVERITY GENMASK(1, 0)
static void cxl_handle_cper_event(enum cxl_event_type ev_type,
struct cxl_cper_event_rec *rec)
{
struct cper_cxl_event_devid *device_id = &rec->hdr.device_id;
struct pci_dev *pdev __free(pci_dev_put) = NULL;
enum cxl_event_log_type log_type;
struct cxl_dev_state *cxlds;
unsigned int devfn;
u32 hdr_flags;
pr_debug("CPER event %d for device %u:%u:%u.%u\n", ev_type,
device_id->segment_num, device_id->bus_num,
device_id->device_num, device_id->func_num);
devfn = PCI_DEVFN(device_id->device_num, device_id->func_num);
pdev = pci_get_domain_bus_and_slot(device_id->segment_num,
device_id->bus_num, devfn);
if (!pdev)
return;
guard(device)(&pdev->dev);
if (pdev->driver != &cxl_pci_driver)
return;
cxlds = pci_get_drvdata(pdev);
if (!cxlds)
return;
/* Fabricate a log type */
hdr_flags = get_unaligned_le24(rec->event.generic.hdr.flags);
log_type = FIELD_GET(CXL_EVENT_HDR_FLAGS_REC_SEVERITY, hdr_flags);
cxl_event_trace_record(cxlds->cxlmd, log_type, ev_type,
&uuid_null, &rec->event);
}
static void cxl_cper_work_fn(struct work_struct *work)
{
struct cxl_cper_work_data wd;
while (cxl_cper_kfifo_get(&wd))
cxl_handle_cper_event(wd.event_type, &wd.rec);
}
static DECLARE_WORK(cxl_cper_work, cxl_cper_work_fn);
static int __init cxl_pci_driver_init(void)
{
int rc;
rc = pci_register_driver(&cxl_pci_driver);
if (rc)
return rc;
rc = cxl_cper_register_work(&cxl_cper_work);
if (rc)
pci_unregister_driver(&cxl_pci_driver);
return rc;
}
static void __exit cxl_pci_driver_exit(void)
{
cxl_cper_unregister_work(&cxl_cper_work);
cancel_work_sync(&cxl_cper_work);
pci_unregister_driver(&cxl_pci_driver);
}
module_init(cxl_pci_driver_init);
module_exit(cxl_pci_driver_exit);
MODULE_DESCRIPTION("CXL: PCI manageability");
MODULE_LICENSE("GPL v2");
MODULE_IMPORT_NS("CXL");
Annotation
- Immediate include surface: `linux/unaligned.h`, `linux/io-64-nonatomic-lo-hi.h`, `linux/moduleparam.h`, `linux/module.h`, `linux/delay.h`, `linux/sizes.h`, `linux/mutex.h`, `linux/list.h`.
- Detected declarations: `struct cxl_dev_id`, `function cxl_pci_mbox_wait_for_doorbell`, `function cxl_request_irq`, `function cxl_mbox_background_complete`, `function cxl_pci_mbox_irq`, `function cxl_mbox_sanitize_work`, `function __cxl_pci_mbox_send_cmd`, `function order`, `function cxl_mbox_background_complete`, `function poll`.
- Atlas domain: Driver Families / drivers/cxl.
- Implementation status: pattern implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.