drivers/devfreq/tegra30-devfreq.c
Source file repositories/reference/linux-study-clean/drivers/devfreq/tegra30-devfreq.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/devfreq/tegra30-devfreq.c- Extension
.c- Size
- 26116 bytes
- Lines
- 986
- Domain
- Driver Families
- Bucket
- drivers/devfreq
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/clk.hlinux/cpufreq.hlinux/devfreq.hlinux/devfreq-governor.hlinux/interrupt.hlinux/io.hlinux/irq.hlinux/minmax.hlinux/module.hlinux/of.hlinux/platform_device.hlinux/pm_opp.hlinux/reset.hlinux/workqueue.hsoc/tegra/fuse.h
Detected Declarations
struct tegra_devfreq_device_configstruct tegra_devfreq_devicestruct tegra_devfreq_soc_datastruct tegra_devfreqstruct tegra_actmon_emc_ratioenum tegra_actmon_devicefunction actmon_readlfunction actmon_writelfunction device_readlfunction device_writelfunction do_percentfunction tegra_devfreq_update_avg_wmarkfunction tegra_devfreq_update_wmarkfunction actmon_isr_devicefunction actmon_cpu_to_emc_ratefunction actmon_device_target_freqfunction actmon_update_targetfunction actmon_thread_isrfunction tegra_actmon_clk_notify_cbfunction tegra_actmon_delayed_updatefunction tegra_actmon_cpufreq_contributionfunction tegra_actmon_cpu_notify_cbfunction tegra_actmon_configure_devicefunction tegra_actmon_stop_devicesfunction tegra_actmon_resumefunction tegra_actmon_startfunction tegra_actmon_pausefunction tegra_actmon_stopfunction tegra_devfreq_targetfunction tegra_devfreq_get_dev_statusfunction tegra_governor_get_targetfunction tegra_governor_event_handlerfunction devm_tegra_devfreq_deinit_hwfunction devm_tegra_devfreq_init_hwfunction tegra_devfreq_config_clks_nopfunction tegra_devfreq_probe
Annotated Snippet
struct tegra_devfreq_device_config {
u32 offset;
u32 irq_mask;
/* Factors applied to boost_freq every consecutive watermark breach */
unsigned int boost_up_coeff;
unsigned int boost_down_coeff;
/* Define the watermark bounds when applied to the current avg */
unsigned int boost_up_threshold;
unsigned int boost_down_threshold;
/*
* Threshold of activity (cycles translated to kHz) below which the
* CPU frequency isn't to be taken into account. This is to avoid
* increasing the EMC frequency when the CPU is very busy but not
* accessing the bus often.
*/
u32 avg_dependency_threshold;
};
enum tegra_actmon_device {
MCALL = 0,
MCCPU,
};
static const struct tegra_devfreq_device_config tegra124_device_configs[] = {
{
/* MCALL: All memory accesses (including from the CPUs) */
.offset = 0x1c0,
.irq_mask = 1 << 26,
.boost_up_coeff = 200,
.boost_down_coeff = 50,
.boost_up_threshold = 60,
.boost_down_threshold = 40,
},
{
/* MCCPU: memory accesses from the CPUs */
.offset = 0x200,
.irq_mask = 1 << 25,
.boost_up_coeff = 800,
.boost_down_coeff = 40,
.boost_up_threshold = 27,
.boost_down_threshold = 10,
.avg_dependency_threshold = 16000, /* 16MHz in kHz units */
},
};
static const struct tegra_devfreq_device_config tegra30_device_configs[] = {
{
/* MCALL: All memory accesses (including from the CPUs) */
.offset = 0x1c0,
.irq_mask = 1 << 26,
.boost_up_coeff = 200,
.boost_down_coeff = 50,
.boost_up_threshold = 20,
.boost_down_threshold = 10,
},
{
/* MCCPU: memory accesses from the CPUs */
.offset = 0x200,
.irq_mask = 1 << 25,
.boost_up_coeff = 800,
.boost_down_coeff = 40,
.boost_up_threshold = 27,
.boost_down_threshold = 10,
.avg_dependency_threshold = 16000, /* 16MHz in kHz units */
},
};
/**
* struct tegra_devfreq_device - state specific to an ACTMON device
*
* Frequencies are in kHz.
*/
struct tegra_devfreq_device {
const struct tegra_devfreq_device_config *config;
void __iomem *regs;
/* Average event count sampled in the last interrupt */
u32 avg_count;
/*
* Extra frequency to increase the target by due to consecutive
* watermark breaches.
*/
unsigned long boost_freq;
/* Optimal frequency calculated from the stats for this device */
unsigned long target_freq;
Annotation
- Immediate include surface: `linux/clk.h`, `linux/cpufreq.h`, `linux/devfreq.h`, `linux/devfreq-governor.h`, `linux/interrupt.h`, `linux/io.h`, `linux/irq.h`, `linux/minmax.h`.
- Detected declarations: `struct tegra_devfreq_device_config`, `struct tegra_devfreq_device`, `struct tegra_devfreq_soc_data`, `struct tegra_devfreq`, `struct tegra_actmon_emc_ratio`, `enum tegra_actmon_device`, `function actmon_readl`, `function actmon_writel`, `function device_readl`, `function device_writel`.
- Atlas domain: Driver Families / drivers/devfreq.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.