drivers/dma/amd/qdma/qdma.h
Source file repositories/reference/linux-study-clean/drivers/dma/amd/qdma/qdma.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/dma/amd/qdma/qdma.h- Extension
.h- Size
- 5890 bytes
- Lines
- 267
- Domain
- Driver Families
- Bucket
- drivers/dma
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitfield.hlinux/dmaengine.hlinux/kernel.hlinux/platform_device.hlinux/regmap.h../../virt-dma.h
Detected Declarations
struct qdma_reg_fieldstruct qdma_regstruct qdma_ctxt_sw_descstruct qdma_ctxt_intrstruct qdma_ctxt_fmapstruct qdma_devicestruct qdma_mm_descstruct qdma_mm_vdescstruct qdma_queuestruct qdma_intr_ringstruct qdma_deviceenum qdma_reg_fieldsenum qdma_regsenum qdma_desc_sizeenum qdma_queue_op_modeenum qdma_ctxt_typeenum qdma_ctxt_cmd
Annotated Snippet
struct qdma_reg_field {
u16 lsb; /* Least significant bit of field */
u16 msb; /* Most significant bit of field */
};
struct qdma_reg {
u32 off;
u32 count;
};
#define QDMA_REGF(_msb, _lsb) { \
.lsb = (_lsb), \
.msb = (_msb), \
}
#define QDMA_REGO(_off, _count) { \
.off = (_off), \
.count = (_count), \
}
enum qdma_desc_size {
QDMA_DESC_SIZE_8B,
QDMA_DESC_SIZE_16B,
QDMA_DESC_SIZE_32B,
QDMA_DESC_SIZE_64B,
};
enum qdma_queue_op_mode {
QDMA_QUEUE_OP_STREAM,
QDMA_QUEUE_OP_MM,
};
enum qdma_ctxt_type {
QDMA_CTXT_DESC_SW_C2H,
QDMA_CTXT_DESC_SW_H2C,
QDMA_CTXT_DESC_HW_C2H,
QDMA_CTXT_DESC_HW_H2C,
QDMA_CTXT_DESC_CR_C2H,
QDMA_CTXT_DESC_CR_H2C,
QDMA_CTXT_WRB,
QDMA_CTXT_PFTCH,
QDMA_CTXT_INTR_COAL,
QDMA_CTXT_RSVD,
QDMA_CTXT_HOST_PROFILE,
QDMA_CTXT_TIMER,
QDMA_CTXT_FMAP,
QDMA_CTXT_FNC_STS,
};
enum qdma_ctxt_cmd {
QDMA_CTXT_CLEAR,
QDMA_CTXT_WRITE,
QDMA_CTXT_READ,
QDMA_CTXT_INVALIDATE,
QDMA_CTXT_MAX
};
struct qdma_ctxt_sw_desc {
u64 desc_base;
u16 vec;
};
struct qdma_ctxt_intr {
u64 agg_base;
u16 vec;
u32 size;
bool valid;
bool color;
};
struct qdma_ctxt_fmap {
u16 qbase;
u16 qmax;
};
struct qdma_device;
struct qdma_mm_desc {
__le64 src_addr;
__le32 len;
__le32 reserved1;
__le64 dst_addr;
__le64 reserved2;
} __packed;
struct qdma_mm_vdesc {
struct virt_dma_desc vdesc;
struct qdma_queue *queue;
struct scatterlist *sgl;
u64 sg_off;
Annotation
- Immediate include surface: `linux/bitfield.h`, `linux/dmaengine.h`, `linux/kernel.h`, `linux/platform_device.h`, `linux/regmap.h`, `../../virt-dma.h`.
- Detected declarations: `struct qdma_reg_field`, `struct qdma_reg`, `struct qdma_ctxt_sw_desc`, `struct qdma_ctxt_intr`, `struct qdma_ctxt_fmap`, `struct qdma_device`, `struct qdma_mm_desc`, `struct qdma_mm_vdesc`, `struct qdma_queue`, `struct qdma_intr_ring`.
- Atlas domain: Driver Families / drivers/dma.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.