drivers/dma/bcm-sba-raid.c
Source file repositories/reference/linux-study-clean/drivers/dma/bcm-sba-raid.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/dma/bcm-sba-raid.c- Extension
.c- Size
- 49157 bytes
- Lines
- 1775
- Domain
- Driver Families
- Bucket
- drivers/dma
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitops.hlinux/debugfs.hlinux/dma-mapping.hlinux/dmaengine.hlinux/list.hlinux/mailbox_client.hlinux/mailbox/brcm-message.hlinux/module.hlinux/of.hlinux/of_platform.hlinux/platform_device.hlinux/slab.hlinux/raid/pq.hlinux/raid/pq_tables.hdmaengine.h
Detected Declarations
struct sba_requeststruct sba_deviceenum sba_request_flagsenum sba_versionfunction sba_cmd_encfunction sba_cmd_load_c_mdatafunction sba_cmd_write_c_mdatafunction sba_cmd_xor_c_mdatafunction sba_cmd_pq_c_mdatafunction _sba_pending_requestfunction _sba_active_requestfunction _sba_abort_requestfunction _sba_free_requestfunction sba_free_chained_requestsfunction sba_chain_requestfunction sba_cleanup_nonpending_requestsfunction sba_cleanup_pending_requestsfunction sba_send_mbox_requestfunction _sba_process_pending_requestsfunction sba_process_received_requestfunction sba_write_stats_in_seqfilefunction sba_free_chan_resourcesfunction sba_device_terminate_allfunction sba_issue_pendingfunction sba_tx_submitfunction sba_tx_statusfunction sba_fillup_interrupt_msgfunction sba_prep_dma_interruptfunction sba_fillup_memcpy_msgfunction sba_prep_dma_memcpy_reqfunction sba_prep_dma_memcpyfunction sba_fillup_xor_msgfunction sba_prep_dma_xor_reqfunction sba_prep_dma_xorfunction sba_fillup_pq_msgfunction sba_prep_dma_pq_reqfunction sba_fillup_pq_single_msgfunction sba_prep_dma_pq_single_reqfunction sba_prep_dma_pqfunction sba_receive_messagefunction sba_debugfs_stats_showfunction sba_prealloc_channel_resourcesfunction sba_freeup_channel_resourcesfunction sba_async_registerfunction sba_probefunction sba_remove
Annotated Snippet
struct sba_request {
/* Global state */
struct list_head node;
struct sba_device *sba;
u32 flags;
/* Chained requests management */
struct sba_request *first;
struct list_head next;
atomic_t next_pending_count;
/* BRCM message data */
struct brcm_message msg;
struct dma_async_tx_descriptor tx;
/* SBA commands */
struct brcm_sba_command cmds[];
};
enum sba_version {
SBA_VER_1 = 0,
SBA_VER_2
};
struct sba_device {
/* Underlying device */
struct device *dev;
/* DT configuration parameters */
enum sba_version ver;
/* Derived configuration parameters */
u32 max_req;
u32 hw_buf_size;
u32 hw_resp_size;
u32 max_pq_coefs;
u32 max_pq_srcs;
u32 max_cmd_per_req;
u32 max_xor_srcs;
u32 max_resp_pool_size;
u32 max_cmds_pool_size;
/* Mailbox client and Mailbox channels */
struct mbox_client client;
struct mbox_chan *mchan;
struct device *mbox_dev;
/* DMA device and DMA channel */
struct dma_device dma_dev;
struct dma_chan dma_chan;
/* DMA channel resources */
void *resp_base;
dma_addr_t resp_dma_base;
void *cmds_base;
dma_addr_t cmds_dma_base;
spinlock_t reqs_lock;
bool reqs_fence;
struct list_head reqs_alloc_list;
struct list_head reqs_pending_list;
struct list_head reqs_active_list;
struct list_head reqs_aborted_list;
struct list_head reqs_free_list;
/* DebugFS directory entries */
struct dentry *root;
};
/* ====== Command helper routines ===== */
static inline u64 __pure sba_cmd_enc(u64 cmd, u32 val, u32 shift, u32 mask)
{
cmd &= ~((u64)mask << shift);
cmd |= ((u64)(val & mask) << shift);
return cmd;
}
static inline u32 __pure sba_cmd_load_c_mdata(u32 b0)
{
return b0 & SBA_C_MDATA_BNUMx_MASK;
}
static inline u32 __pure sba_cmd_write_c_mdata(u32 b0)
{
return b0 & SBA_C_MDATA_BNUMx_MASK;
}
static inline u32 __pure sba_cmd_xor_c_mdata(u32 b1, u32 b0)
{
return (b0 & SBA_C_MDATA_BNUMx_MASK) |
((b1 & SBA_C_MDATA_BNUMx_MASK) << SBA_C_MDATA_BNUMx_SHIFT(1));
}
static inline u32 __pure sba_cmd_pq_c_mdata(u32 d, u32 b1, u32 b0)
{
return (b0 & SBA_C_MDATA_BNUMx_MASK) |
((b1 & SBA_C_MDATA_BNUMx_MASK) << SBA_C_MDATA_BNUMx_SHIFT(1)) |
((d & SBA_C_MDATA_DNUM_MASK) << SBA_C_MDATA_DNUM_SHIFT);
}
Annotation
- Immediate include surface: `linux/bitops.h`, `linux/debugfs.h`, `linux/dma-mapping.h`, `linux/dmaengine.h`, `linux/list.h`, `linux/mailbox_client.h`, `linux/mailbox/brcm-message.h`, `linux/module.h`.
- Detected declarations: `struct sba_request`, `struct sba_device`, `enum sba_request_flags`, `enum sba_version`, `function sba_cmd_enc`, `function sba_cmd_load_c_mdata`, `function sba_cmd_write_c_mdata`, `function sba_cmd_xor_c_mdata`, `function sba_cmd_pq_c_mdata`, `function _sba_pending_request`.
- Atlas domain: Driver Families / drivers/dma.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.