drivers/dma/lgm/lgm-dma.c
Source file repositories/reference/linux-study-clean/drivers/dma/lgm/lgm-dma.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/dma/lgm/lgm-dma.c- Extension
.c- Size
- 41981 bytes
- Lines
- 1731
- Domain
- Driver Families
- Bucket
- drivers/dma
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitfield.hlinux/clk.hlinux/dma-mapping.hlinux/dmapool.hlinux/err.hlinux/export.hlinux/init.hlinux/interrupt.hlinux/iopoll.hlinux/of_dma.hlinux/of_irq.hlinux/platform_device.hlinux/reset.h../dmaengine.h../virt-dma.h
Detected Declarations
struct ldma_devstruct ldma_portstruct ldma_chanstruct ldma_portstruct ldma_inst_datastruct ldma_devstruct dw2_descstruct dw2_desc_swenum ldma_chan_on_offfunction ldma_update_bitsfunction ldma_chan_txfunction ldma_chan_is_hw_descfunction ldma_dev_resetfunction ldma_dev_pkt_arb_cfgfunction ldma_dev_sram_desc_cfgfunction ldma_dev_chan_flow_ctl_cfgfunction ldma_dev_global_polling_enablefunction ldma_dev_desc_fetch_on_demand_cfgfunction ldma_dev_byte_enable_cfgfunction ldma_dev_orrc_cfgfunction ldma_dev_df_tout_cfgfunction ldma_dev_dburst_wr_cfgfunction ldma_dev_vld_fetch_ack_cfgfunction ldma_dev_drb_cfgfunction ldma_dev_cfgfunction ldma_chan_cctrl_cfgfunction ldma_chan_irq_initfunction ldma_chan_set_classfunction ldma_chan_onfunction ldma_chan_offfunction ldma_chan_desc_hw_cfgfunction ldma_chan_desc_cfgfunction ldma_chan_resetfunction ldma_chan_byte_offset_cfgfunction ldma_chan_data_endian_cfgfunction ldma_chan_desc_endian_cfgfunction ldma_chan_hdr_mode_cfgfunction ldma_chan_rxwr_np_cfgfunction ldma_chan_abc_cfgfunction ldma_port_cfgfunction ldma_chan_cfgfunction ldma_dev_initfunction ldma_parse_dtfunction dma_free_desc_resourcefunction dma_alloc_desc_resourcefunction ldma_chan_irq_enfunction ldma_issue_pendingfunction ldma_synchronize
Annotated Snippet
struct ldma_chan {
struct virt_dma_chan vchan;
struct ldma_port *port; /* back pointer */
char name[8]; /* Channel name */
int nr; /* Channel id in hardware */
u32 flags; /* central way or channel based way */
enum ldma_chan_on_off onoff;
dma_addr_t desc_phys;
void *desc_base; /* Virtual address */
u32 desc_cnt; /* Number of descriptors */
int rst;
u32 hdrm_len;
bool hdrm_csum;
u32 boff_len;
u32 data_endian;
u32 desc_endian;
bool pden;
bool desc_rx_np;
bool data_endian_en;
bool desc_endian_en;
bool abc_en;
bool desc_init;
struct dma_pool *desc_pool; /* Descriptors pool */
u32 desc_num;
struct dw2_desc_sw *ds;
struct work_struct work;
struct dma_slave_config config;
};
struct ldma_port {
struct ldma_dev *ldev; /* back pointer */
u32 portid;
u32 rxbl;
u32 txbl;
u32 rxendi;
u32 txendi;
u32 pkt_drop;
};
/* Instance specific data */
struct ldma_inst_data {
bool desc_in_sram;
bool chan_fc;
bool desc_fod; /* Fetch On Demand */
bool valid_desc_fetch_ack;
u32 orrc; /* Outstanding read count */
const char *name;
u32 type;
};
struct ldma_dev {
struct device *dev;
void __iomem *base;
struct reset_control *rst;
struct clk *core_clk;
struct dma_device dma_dev;
u32 ver;
int irq;
struct ldma_port *ports;
struct ldma_chan *chans; /* channel list on this DMA or port */
spinlock_t dev_lock; /* Controller register exclusive */
u32 chan_nrs;
u32 port_nrs;
u32 channels_mask;
u32 flags;
u32 pollcnt;
const struct ldma_inst_data *inst;
struct workqueue_struct *wq;
};
struct dw2_desc {
u32 field;
u32 addr;
} __packed __aligned(8);
struct dw2_desc_sw {
struct virt_dma_desc vdesc;
struct ldma_chan *chan;
dma_addr_t desc_phys;
size_t desc_cnt;
size_t size;
struct dw2_desc *desc_hw;
};
static inline void
ldma_update_bits(struct ldma_dev *d, u32 mask, u32 val, u32 ofs)
{
u32 old_val, new_val;
old_val = readl(d->base + ofs);
Annotation
- Immediate include surface: `linux/bitfield.h`, `linux/clk.h`, `linux/dma-mapping.h`, `linux/dmapool.h`, `linux/err.h`, `linux/export.h`, `linux/init.h`, `linux/interrupt.h`.
- Detected declarations: `struct ldma_dev`, `struct ldma_port`, `struct ldma_chan`, `struct ldma_port`, `struct ldma_inst_data`, `struct ldma_dev`, `struct dw2_desc`, `struct dw2_desc_sw`, `enum ldma_chan_on_off`, `function ldma_update_bits`.
- Atlas domain: Driver Families / drivers/dma.
- Implementation status: integration implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.