drivers/dma/qcom/gpi.c

File Facts

System

Linux kernel

Corpus path

drivers/dma/qcom/gpi.c

Extension

.c

Size

66378 bytes

Lines

2330

Domain

Driver Families

Bucket

drivers/dma

Inferred role

Driver Families: exported/initcall integration point

Status

integration implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
• Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
• Touches IRQ or DMA behavior; this matters for the representative real-device path.
• Allocates kernel memory; connect allocation flags and lifetime to context constraints.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• dt-bindings/dma/qcom-gpi.h
• linux/bitfield.h
• linux/dma-mapping.h
• linux/dmaengine.h
• linux/module.h
• linux/of_dma.h
• linux/platform_device.h
• linux/dma/qcom-gpi-dma.h
• linux/scatterlist.h
• linux/slab.h
• ../dmaengine.h
• ../virt-dma.h

Detected Declarations

• struct gpi_ring
• struct gpi_dev
• struct gchan
• struct gpii
• struct gpi_desc
• enum CNTXT_OFFS
• enum msm_gpi_tce_code
• enum GPI_EV_TYPE
• enum gpii_irq_settings
• enum gpi_ev_state
• enum gpi_ch_state
• enum gpi_cmd
• enum gpi_pm_state
• function to_physical
• function gpi_read_reg
• function gpi_write_reg
• function gpi_update_reg
• function gpi_disable_interrupts
• function gpi_config_interrupts
• function gpi_send_cmd
• function gpi_write_ch_db
• function gpi_write_ev_db
• function gpi_process_ieob
• function gpi_process_ch_ctrl_irq
• function gpi_process_gen_err_irq
• function gpi_process_glob_err_irq
• function gpi_handle_irq
• function gpi_process_imed_data_event
• function gpi_process_xfer_compl_event
• function gpi_process_events
• function gpi_ev_tasklet
• function gpi_mark_stale_events
• function gpi_reset_chan
• function gpi_start_chan
• function gpi_stop_chan
• function gpi_alloc_chan
• function gpi_alloc_ev_chan
• function gpi_ring_num_elements_avail
• function gpi_ring_add_element
• function gpi_ring_recycle_ev_element
• function gpi_free_ring
• function gpi_alloc_ring
• function gpi_queue_xfer
• function gpi_terminate_all
• function gpi_pause
• function gpi_resume
• function gpi_desc_free
• function gpi_peripheral_config

Annotated Snippet

subsys_initcall(gpi_init)

MODULE_DESCRIPTION("QCOM GPI DMA engine driver");
MODULE_LICENSE("GPL v2");

Annotation

• Immediate include surface: `dt-bindings/dma/qcom-gpi.h`, `linux/bitfield.h`, `linux/dma-mapping.h`, `linux/dmaengine.h`, `linux/module.h`, `linux/of_dma.h`, `linux/platform_device.h`, `linux/dma/qcom-gpi-dma.h`.
• Detected declarations: `struct gpi_ring`, `struct gpi_dev`, `struct gchan`, `struct gpii`, `struct gpi_desc`, `enum CNTXT_OFFS`, `enum msm_gpi_tce_code`, `enum GPI_EV_TYPE`, `enum gpii_irq_settings`, `enum gpi_ev_state`.
• Atlas domain: Driver Families / drivers/dma.
• Implementation status: integration implementation candidate.
• Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
• IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.