drivers/dma/qcom/hidma.h

Source file repositories/reference/linux-study-clean/drivers/dma/qcom/hidma.h

File Facts

System
Linux kernel
Corpus path
drivers/dma/qcom/hidma.h
Extension
.h
Size
5285 bytes
Lines
161
Domain
Driver Families
Bucket
drivers/dma
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct hidma_tre {
	atomic_t allocated;		/* if this channel is allocated	    */
	bool queued;			/* flag whether this is pending     */
	u16 status;			/* status			    */
	u32 idx;			/* index of the tre		    */
	u32 dma_sig;			/* signature of the tre		    */
	const char *dev_name;		/* name of the device		    */
	void (*callback)(void *data);	/* requester callback		    */
	void *data;			/* Data associated with this channel*/
	struct hidma_lldev *lldev;	/* lldma device pointer		    */
	u32 tre_local[HIDMA_TRE_SIZE / sizeof(u32) + 1]; /* TRE local copy  */
	u32 tre_index;			/* the offset where this was written*/
	u32 int_flags;			/* interrupt flags		    */
	u8 err_info;			/* error record in this transfer    */
	u8 err_code;			/* completion code		    */
};

struct hidma_lldev {
	bool msi_support;		/* flag indicating MSI support    */
	bool initialized;		/* initialized flag               */
	u8 trch_state;			/* trch_state of the device	  */
	u8 evch_state;			/* evch_state of the device	  */
	u8 chidx;			/* channel index in the core	  */
	u32 nr_tres;			/* max number of configs          */
	spinlock_t lock;		/* reentrancy                     */
	struct hidma_tre *trepool;	/* trepool of user configs */
	struct device *dev;		/* device			  */
	void __iomem *trca;		/* Transfer Channel address       */
	void __iomem *evca;		/* Event Channel address          */
	struct hidma_tre
		**pending_tre_list;	/* Pointers to pending TREs	  */
	atomic_t pending_tre_count;	/* Number of TREs pending	  */

	void *tre_ring;			/* TRE ring			  */
	dma_addr_t tre_dma;		/* TRE ring to be shared with HW  */
	u32 tre_ring_size;		/* Byte size of the ring	  */
	u32 tre_processed_off;		/* last processed TRE		  */

	void *evre_ring;		/* EVRE ring			   */
	dma_addr_t evre_dma;		/* EVRE ring to be shared with HW  */
	u32 evre_ring_size;		/* Byte size of the ring	   */
	u32 evre_processed_off;		/* last processed EVRE		   */

	u32 tre_write_offset;           /* TRE write location              */
	struct tasklet_struct task;	/* task delivering notifications   */
	DECLARE_KFIFO_PTR(handoff_fifo,
		struct hidma_tre *);    /* pending TREs FIFO               */
};

struct hidma_desc {
	struct dma_async_tx_descriptor	desc;
	/* link list node for this channel*/
	struct list_head		node;
	u32				tre_ch;
};

struct hidma_chan {
	bool				paused;
	bool				allocated;
	char				dbg_name[16];
	u32				dma_sig;
	dma_cookie_t			last_success;

	/*
	 * active descriptor on this channel
	 * It is used by the DMA complete notification to
	 * locate the descriptor that initiated the transfer.
	 */
	struct hidma_dev		*dmadev;
	struct hidma_desc		*running;

	struct dma_chan			chan;
	struct list_head		free;
	struct list_head		prepared;
	struct list_head		queued;
	struct list_head		active;
	struct list_head		completed;

	/* Lock for this structure */
	spinlock_t			lock;
};

struct hidma_dev {
	int				irq;
	int				chidx;
	u32				nr_descriptors;
	int				msi_virqbase;

	struct hidma_lldev		*lldev;
	void				__iomem *dev_trca;

Annotation

Implementation Notes