drivers/dma/sun6i-dma.c
Source file repositories/reference/linux-study-clean/drivers/dma/sun6i-dma.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/dma/sun6i-dma.c- Extension
.c- Size
- 42361 bytes
- Lines
- 1528
- Domain
- Driver Families
- Bucket
- drivers/dma
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/clk.hlinux/delay.hlinux/dma-mapping.hlinux/dmaengine.hlinux/dmapool.hlinux/interrupt.hlinux/module.hlinux/of.hlinux/of_dma.hlinux/platform_device.hlinux/reset.hlinux/slab.hlinux/string_choices.hlinux/types.hvirt-dma.h
Detected Declarations
struct sun6i_dma_devstruct sun6i_dma_configstruct sun6i_dma_llistruct sun6i_descstruct sun6i_pchanstruct sun6i_vchanstruct sun6i_dma_devfunction to_sun6i_descfunction sun6i_dma_dump_com_regsfunction sun6i_dma_dump_chan_regsfunction convert_burstfunction convert_buswidthfunction sun6i_enable_clock_autogate_a23function sun6i_enable_clock_autogate_h3function sun6i_set_burst_length_a31function sun6i_set_burst_length_h3function sun6i_set_drq_a31function sun6i_set_drq_h6function sun6i_set_mode_a31function sun6i_set_mode_h6function sun6i_get_chan_sizefunction sun6i_dma_dump_llifunction sun6i_dma_free_descfunction sun6i_dma_start_descfunction sun6i_dma_taskletfunction list_for_each_entryfunction sun6i_dma_interruptfunction find_burst_sizefunction set_configfunction sun6i_dma_set_addrfunction for_each_sgfunction sun6i_dma_configfunction sun6i_dma_pausefunction sun6i_dma_resumefunction sun6i_dma_terminate_allfunction sun6i_dma_tx_statusfunction sun6i_dma_issue_pendingfunction sun6i_dma_free_chan_resourcesfunction sun6i_kill_taskletfunction sun6i_dma_freefunction sun6i_dma_probefunction sun6i_dma_remove
Annotated Snippet
struct sun6i_dma_config {
u32 nr_max_channels;
u32 nr_max_requests;
u32 nr_max_vchans;
/*
* In the datasheets/user manuals of newer Allwinner SoCs, a special
* bit (bit 2 at register 0x20) is present.
* It's named "DMA MCLK interface circuit auto gating bit" in the
* documents, and the footnote of this register says that this bit
* should be set up when initializing the DMA controller.
* Allwinner A23/A33 user manuals do not have this bit documented,
* however these SoCs really have and need this bit, as seen in the
* BSP kernel source code.
*/
void (*clock_autogate_enable)(struct sun6i_dma_dev *);
void (*set_burst_length)(u32 *p_cfg, s8 src_burst, s8 dst_burst);
void (*set_drq)(u32 *p_cfg, s8 src_drq, s8 dst_drq);
void (*set_mode)(u32 *p_cfg, s8 src_mode, s8 dst_mode);
u32 src_burst_lengths;
u32 dst_burst_lengths;
u32 src_addr_widths;
u32 dst_addr_widths;
bool has_high_addr;
bool has_mbus_clk;
};
/*
* Hardware representation of the LLI
*
* The hardware will be fed the physical address of this structure,
* and read its content in order to start the transfer.
*/
struct sun6i_dma_lli {
u32 cfg;
u32 src;
u32 dst;
u32 len;
u32 para;
u32 p_lli_next;
/*
* This field is not used by the DMA controller, but will be
* used by the CPU to go through the list (mostly for dumping
* or freeing it).
*/
struct sun6i_dma_lli *v_lli_next;
};
struct sun6i_desc {
struct virt_dma_desc vd;
dma_addr_t p_lli;
struct sun6i_dma_lli *v_lli;
};
struct sun6i_pchan {
u32 idx;
void __iomem *base;
struct sun6i_vchan *vchan;
struct sun6i_desc *desc;
struct sun6i_desc *done;
};
struct sun6i_vchan {
struct virt_dma_chan vc;
struct list_head node;
struct dma_slave_config cfg;
struct sun6i_pchan *phy;
u8 port;
u8 irq_type;
bool cyclic;
};
struct sun6i_dma_dev {
struct dma_device slave;
void __iomem *base;
struct clk *clk;
struct clk *clk_mbus;
int irq;
spinlock_t lock;
struct reset_control *rstc;
struct tasklet_struct task;
atomic_t tasklet_shutdown;
struct list_head pending;
struct dma_pool *pool;
struct sun6i_pchan *pchans;
struct sun6i_vchan *vchans;
const struct sun6i_dma_config *cfg;
u32 num_pchans;
u32 num_vchans;
Annotation
- Immediate include surface: `linux/clk.h`, `linux/delay.h`, `linux/dma-mapping.h`, `linux/dmaengine.h`, `linux/dmapool.h`, `linux/interrupt.h`, `linux/module.h`, `linux/of.h`.
- Detected declarations: `struct sun6i_dma_dev`, `struct sun6i_dma_config`, `struct sun6i_dma_lli`, `struct sun6i_desc`, `struct sun6i_pchan`, `struct sun6i_vchan`, `struct sun6i_dma_dev`, `function to_sun6i_desc`, `function sun6i_dma_dump_com_regs`, `function sun6i_dma_dump_chan_regs`.
- Atlas domain: Driver Families / drivers/dma.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.