drivers/dma/ti/cppi41.c
Source file repositories/reference/linux-study-clean/drivers/dma/ti/cppi41.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/dma/ti/cppi41.c- Extension
.c- Size
- 30356 bytes
- Lines
- 1253
- Domain
- Driver Families
- Bucket
- drivers/dma
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/delay.hlinux/dmaengine.hlinux/dma-mapping.hlinux/platform_device.hlinux/module.hlinux/of.hlinux/slab.hlinux/of_dma.hlinux/of_irq.hlinux/dmapool.hlinux/interrupt.hlinux/of_address.hlinux/pm_runtime.h../dmaengine.h
Detected Declarations
struct cppi41_channelstruct cppi41_descstruct chan_queuesstruct cppi41_ddstruct cppi_glue_infosfunction cppi_writelfunction cppi_readlfunction pd_trans_lenfunction cppi41_pop_descfunction cppi41_irqfunction cppi41_tx_submitfunction cppi41_dma_alloc_chan_resourcesfunction cppi41_dma_free_chan_resourcesfunction cppi41_dma_tx_statusfunction push_desc_queuefunction cppi41_runtime_resumefunction list_for_each_entry_safefunction cppi41_dma_issue_pendingfunction get_host_pd0function get_host_pd1function get_host_pd2function get_host_pd3function get_host_pd6function get_host_pd4_or_7function get_host_pd5function cppi41_compute_td_descfunction cppi41_tear_down_chanfunction cppi41_stop_chanfunction cppi41_dma_issue_pendingfunction cppi41_add_chansfunction purge_descsfunction disable_schedfunction deinit_cppi41function init_descsfunction init_schedfunction init_cppi41function cpp41_dma_filter_fnfunction BITfunction cppi41_dma_removefunction cppi41_suspendfunction cppi41_resumefunction cppi41_runtime_suspendfunction cppi41_runtime_resume
Annotated Snippet
struct cppi41_channel {
struct dma_chan chan;
struct dma_async_tx_descriptor txd;
struct cppi41_dd *cdd;
struct cppi41_desc *desc;
dma_addr_t desc_phys;
void __iomem *gcr_reg;
int is_tx;
u32 residue;
unsigned int q_num;
unsigned int q_comp_num;
unsigned int port_num;
unsigned td_retry;
unsigned td_queued:1;
unsigned td_seen:1;
unsigned td_desc_seen:1;
struct list_head node; /* Node for pending list */
};
struct cppi41_desc {
u32 pd0;
u32 pd1;
u32 pd2;
u32 pd3;
u32 pd4;
u32 pd5;
u32 pd6;
u32 pd7;
} __aligned(32);
struct chan_queues {
u16 submit;
u16 complete;
};
struct cppi41_dd {
struct dma_device ddev;
void *qmgr_scratch;
dma_addr_t scratch_phys;
struct cppi41_desc *cd;
dma_addr_t descs_phys;
u32 first_td_desc;
struct cppi41_channel *chan_busy[ALLOC_DECS_NUM];
void __iomem *ctrl_mem;
void __iomem *sched_mem;
void __iomem *qmgr_mem;
unsigned int irq;
const struct chan_queues *queues_rx;
const struct chan_queues *queues_tx;
struct chan_queues td_queue;
u16 first_completion_queue;
u16 qmgr_num_pend;
u32 n_chans;
u8 platform;
struct list_head pending; /* Pending queued transfers */
spinlock_t lock; /* Lock for pending list */
/* context for suspend/resume */
unsigned int dma_tdfdq;
bool is_suspended;
};
static struct chan_queues am335x_usb_queues_tx[] = {
/* USB0 ENDP 1 */
[ 0] = { .submit = 32, .complete = 93},
[ 1] = { .submit = 34, .complete = 94},
[ 2] = { .submit = 36, .complete = 95},
[ 3] = { .submit = 38, .complete = 96},
[ 4] = { .submit = 40, .complete = 97},
[ 5] = { .submit = 42, .complete = 98},
[ 6] = { .submit = 44, .complete = 99},
[ 7] = { .submit = 46, .complete = 100},
[ 8] = { .submit = 48, .complete = 101},
[ 9] = { .submit = 50, .complete = 102},
[10] = { .submit = 52, .complete = 103},
[11] = { .submit = 54, .complete = 104},
[12] = { .submit = 56, .complete = 105},
[13] = { .submit = 58, .complete = 106},
[14] = { .submit = 60, .complete = 107},
/* USB1 ENDP1 */
[15] = { .submit = 62, .complete = 125},
Annotation
- Immediate include surface: `linux/delay.h`, `linux/dmaengine.h`, `linux/dma-mapping.h`, `linux/platform_device.h`, `linux/module.h`, `linux/of.h`, `linux/slab.h`, `linux/of_dma.h`.
- Detected declarations: `struct cppi41_channel`, `struct cppi41_desc`, `struct chan_queues`, `struct cppi41_dd`, `struct cppi_glue_infos`, `function cppi_writel`, `function cppi_readl`, `function pd_trans_len`, `function cppi41_pop_desc`, `function cppi41_irq`.
- Atlas domain: Driver Families / drivers/dma.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.