drivers/dma/xilinx/zynqmp_dma.c

Source file repositories/reference/linux-study-clean/drivers/dma/xilinx/zynqmp_dma.c

File Facts

System
Linux kernel
Corpus path
drivers/dma/xilinx/zynqmp_dma.c
Extension
.c
Size
33429 bytes
Lines
1201
Domain
Driver Families
Bucket
drivers/dma
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct zynqmp_dma_desc_ll {
	u64 addr;
	u32 size;
	u32 ctrl;
	u64 nxtdscraddr;
	u64 rsvd;
};

/**
 * struct zynqmp_dma_desc_sw - Per Transaction structure
 * @src: Source address for simple mode dma
 * @dst: Destination address for simple mode dma
 * @len: Transfer length for simple mode dma
 * @node: Node in the channel descriptor list
 * @tx_list: List head for the current transfer
 * @async_tx: Async transaction descriptor
 * @src_v: Virtual address of the src descriptor
 * @src_p: Physical address of the src descriptor
 * @dst_v: Virtual address of the dst descriptor
 * @dst_p: Physical address of the dst descriptor
 */
struct zynqmp_dma_desc_sw {
	u64 src;
	u64 dst;
	u32 len;
	struct list_head node;
	struct list_head tx_list;
	struct dma_async_tx_descriptor async_tx;
	struct zynqmp_dma_desc_ll *src_v;
	dma_addr_t src_p;
	struct zynqmp_dma_desc_ll *dst_v;
	dma_addr_t dst_p;
};

/**
 * struct zynqmp_dma_chan - Driver specific DMA channel structure
 * @zdev: Driver specific device structure
 * @regs: Control registers offset
 * @lock: Descriptor operation lock
 * @pending_list: Descriptors waiting
 * @free_list: Descriptors free
 * @active_list: Descriptors active
 * @sw_desc_pool: SW descriptor pool
 * @done_list: Complete descriptors
 * @common: DMA common channel
 * @desc_pool_v: Statically allocated descriptor base
 * @desc_pool_p: Physical allocated descriptor base
 * @desc_free_cnt: Descriptor available count
 * @dev: The dma device
 * @irq: Channel IRQ
 * @is_dmacoherent: Tells whether dma operations are coherent or not
 * @tasklet: Cleanup work after irq
 * @idle : Channel status;
 * @desc_size: Size of the low level descriptor
 * @err: Channel has errors
 * @bus_width: Bus width
 * @src_burst_len: Source burst length
 * @dst_burst_len: Dest burst length
 * @irq_offset: Irq register offset
 */
struct zynqmp_dma_chan {
	struct zynqmp_dma_device *zdev;
	void __iomem *regs;
	spinlock_t lock;
	struct list_head pending_list;
	struct list_head free_list;
	struct list_head active_list;
	struct zynqmp_dma_desc_sw *sw_desc_pool;
	struct list_head done_list;
	struct dma_chan common;
	void *desc_pool_v;
	dma_addr_t desc_pool_p;
	u32 desc_free_cnt;
	struct device *dev;
	int irq;
	bool is_dmacoherent;
	struct tasklet_struct tasklet;
	bool idle;
	size_t desc_size;
	bool err;
	u32 bus_width;
	u32 src_burst_len;
	u32 dst_burst_len;
	u32 irq_offset;
};

/**
 * struct zynqmp_dma_device - DMA device structure
 * @dev: Device Structure
 * @common: DMA device structure

Annotation

Implementation Notes