drivers/dpll/dpll_netlink.c
Source file repositories/reference/linux-study-clean/drivers/dpll/dpll_netlink.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/dpll/dpll_netlink.c- Extension
.c- Size
- 54287 bytes
- Lines
- 2135
- Domain
- Driver Families
- Bucket
- drivers/dpll
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/module.hlinux/kernel.hlinux/netdevice.hnet/genetlink.hdpll_core.hdpll_netlink.hdpll_nl.huapi/linux/dpll.h
Detected Declarations
struct dpll_dump_ctxfunction dpll_msg_add_dev_handlefunction dpll_msg_add_dev_parent_handlefunction dpll_pin_availablefunction dpll_msg_add_pin_handlefunction dpll_netdev_add_pin_handlefunction dpll_msg_add_modefunction dpll_msg_add_mode_supportedfunction dpll_msg_add_phase_offset_monitorfunction dpll_msg_add_freq_monitorfunction dpll_msg_add_phase_offset_avg_factorfunction dpll_msg_add_lock_statusfunction dpll_msg_add_tempfunction dpll_msg_add_clock_quality_levelfunction dpll_msg_add_pin_priofunction dpll_msg_add_pin_on_dpll_statefunction dpll_msg_add_pin_operstatefunction dpll_msg_add_pin_directionfunction dpll_msg_add_pin_phase_adjustfunction dpll_msg_add_phase_offsetfunction dpll_msg_add_ffofunction dpll_msg_add_measured_freqfunction dpll_msg_add_pin_freqfunction dpll_msg_add_pin_esyncfunction dpll_msg_add_pin_ref_syncfunction dpll_pin_is_freq_supportedfunction dpll_msg_add_pin_parentsfunction xa_for_eachfunction dpll_msg_add_pin_dpllsfunction xa_for_eachfunction dpll_cmd_pin_get_onefunction dpll_device_get_onefunction dpll_device_event_sendfunction dpll_device_create_ntffunction dpll_device_delete_ntffunction __dpll_device_change_ntffunction dpll_device_change_ntffunction dpll_pin_event_sendfunction dpll_pin_create_ntffunction dpll_pin_delete_ntffunction __dpll_pin_change_ntffunction dpll_pin_change_ntffunction dpll_mode_setfunction dpll_phase_offset_monitor_setfunction dpll_phase_offset_avg_factor_setfunction dpll_freq_monitor_setfunction dpll_pin_freq_setfunction xa_for_each
Annotated Snippet
struct dpll_dump_ctx {
unsigned long idx;
};
static struct dpll_dump_ctx *dpll_dump_context(struct netlink_callback *cb)
{
return (struct dpll_dump_ctx *)cb->ctx;
}
static int
dpll_msg_add_dev_handle(struct sk_buff *msg, struct dpll_device *dpll)
{
if (nla_put_u32(msg, DPLL_A_ID, dpll->id))
return -EMSGSIZE;
return 0;
}
static int
dpll_msg_add_dev_parent_handle(struct sk_buff *msg, u32 id)
{
if (nla_put_u32(msg, DPLL_A_PIN_PARENT_ID, id))
return -EMSGSIZE;
return 0;
}
static bool dpll_pin_available(struct dpll_pin *pin)
{
struct dpll_pin_ref *par_ref;
unsigned long i;
if (!xa_get_mark(&dpll_pin_xa, pin->id, DPLL_REGISTERED))
return false;
xa_for_each(&pin->parent_refs, i, par_ref)
if (xa_get_mark(&dpll_pin_xa, par_ref->pin->id,
DPLL_REGISTERED))
return true;
xa_for_each(&pin->dpll_refs, i, par_ref)
if (xa_get_mark(&dpll_device_xa, par_ref->dpll->id,
DPLL_REGISTERED))
return true;
return false;
}
/**
* dpll_msg_add_pin_handle - attach pin handle attribute to a given message
* @msg: pointer to sk_buff message to attach a pin handle
* @pin: pin pointer
*
* Return:
* * 0 - success
* * -EMSGSIZE - no space in message to attach pin handle
*/
static int dpll_msg_add_pin_handle(struct sk_buff *msg, struct dpll_pin *pin)
{
if (!pin)
return 0;
if (nla_put_u32(msg, DPLL_A_PIN_ID, pin->id))
return -EMSGSIZE;
return 0;
}
static struct dpll_pin *dpll_netdev_pin(const struct net_device *dev)
{
return rcu_dereference_rtnl(dev->dpll_pin);
}
int dpll_netdev_add_pin_handle(struct sk_buff *msg,
const struct net_device *dev)
{
return dpll_msg_add_pin_handle(msg, dpll_netdev_pin(dev));
}
static int
dpll_msg_add_mode(struct sk_buff *msg, struct dpll_device *dpll,
struct netlink_ext_ack *extack)
{
const struct dpll_device_ops *ops = dpll_device_ops(dpll);
enum dpll_mode mode;
int ret;
ret = ops->mode_get(dpll, dpll_priv(dpll), &mode, extack);
if (ret)
return ret;
if (nla_put_u32(msg, DPLL_A_MODE, mode))
return -EMSGSIZE;
return 0;
}
Annotation
- Immediate include surface: `linux/module.h`, `linux/kernel.h`, `linux/netdevice.h`, `net/genetlink.h`, `dpll_core.h`, `dpll_netlink.h`, `dpll_nl.h`, `uapi/linux/dpll.h`.
- Detected declarations: `struct dpll_dump_ctx`, `function dpll_msg_add_dev_handle`, `function dpll_msg_add_dev_parent_handle`, `function dpll_pin_available`, `function dpll_msg_add_pin_handle`, `function dpll_netdev_add_pin_handle`, `function dpll_msg_add_mode`, `function dpll_msg_add_mode_supported`, `function dpll_msg_add_phase_offset_monitor`, `function dpll_msg_add_freq_monitor`.
- Atlas domain: Driver Families / drivers/dpll.
- Implementation status: integration implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.