drivers/dpll/zl3073x/dpll.c
Source file repositories/reference/linux-study-clean/drivers/dpll/zl3073x/dpll.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/dpll/zl3073x/dpll.c- Extension
.c- Size
- 56710 bytes
- Lines
- 2100
- Domain
- Driver Families
- Bucket
- drivers/dpll
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/atomic.hlinux/bits.hlinux/bitfield.hlinux/bug.hlinux/container_of.hlinux/dev_printk.hlinux/dpll.hlinux/err.hlinux/kthread.hlinux/math64.hlinux/mod_devicetable.hlinux/module.hlinux/netlink.hlinux/platform_device.hlinux/property.hlinux/slab.hlinux/sprintf.hcore.hdpll.hprop.hregs.h
Detected Declarations
struct zl3073x_dpll_pinfunction zl3073x_dpll_is_input_pinfunction zl3073x_dpll_is_p_pinfunction zl3073x_dpll_pin_direction_getfunction zl3073x_dpll_pin_get_by_reffunction list_for_each_entryfunction zl3073x_dpll_input_pin_esync_getfunction zl3073x_dpll_input_pin_esync_setfunction zl3073x_dpll_input_pin_ref_sync_getfunction zl3073x_dpll_input_pin_ref_sync_setfunction zl3073x_dpll_input_pin_ffo_getfunction zl3073x_dpll_input_pin_measured_freq_getfunction zl3073x_dpll_input_pin_frequency_getfunction zl3073x_dpll_input_pin_frequency_setfunction zl3073x_dpll_connected_ref_getfunction zl3073x_dpll_input_pin_phase_offset_getfunction zl3073x_dpll_input_pin_phase_adjust_getfunction zl3073x_dpll_input_pin_phase_adjust_setfunction zl3073x_dpll_ref_operstate_getfunction zl3073x_dpll_input_pin_state_on_dpll_getfunction zl3073x_dpll_input_pin_operstate_on_dpll_getfunction zl3073x_dpll_input_pin_state_on_dpll_setfunction zl3073x_dpll_input_pin_prio_getfunction zl3073x_dpll_input_pin_prio_setfunction zl3073x_dpll_output_pin_esync_getfunction zl3073x_dpll_output_pin_esync_setfunction zl3073x_dpll_output_pin_frequency_getfunction zl3073x_dpll_output_pin_frequency_setfunction zl3073x_dpll_output_pin_phase_adjust_getfunction zl3073x_dpll_output_pin_phase_adjust_setfunction zl3073x_dpll_output_pin_state_on_dpll_getfunction zl3073x_dpll_temp_getfunction zl3073x_dpll_lock_status_getfunction zl3073x_dpll_supported_modes_getfunction zl3073x_dpll_mode_getfunction zl3073x_dpll_phase_offset_avg_factor_getfunction zl3073x_dpll_phase_offset_avg_factor_setfunction zl3073x_dpll_mode_setfunction zl3073x_dpll_phase_offset_monitor_getfunction zl3073x_dpll_phase_offset_monitor_setfunction zl3073x_dpll_freq_monitor_getfunction zl3073x_dpll_freq_monitor_setfunction zl3073x_dpll_pin_allocfunction zl3073x_dpll_pin_freefunction zl3073x_dpll_pin_registerfunction zl3073x_dpll_pin_unregisterfunction zl3073x_dpll_pins_unregisterfunction list_for_each_entry_safe
Annotated Snippet
struct zl3073x_dpll_pin {
struct list_head list;
struct zl3073x_dpll *dpll;
struct dpll_pin *dpll_pin;
dpll_tracker tracker;
struct fwnode_handle *fwnode;
char label[8];
enum dpll_pin_direction dir;
u8 id;
u8 prio;
bool esync_control;
s32 phase_gran;
enum dpll_pin_operstate operstate;
s64 phase_offset;
atomic64_t freq_offset;
u32 measured_freq;
};
/*
* Supported esync ranges for input and for output per output pair type
*/
static const struct dpll_pin_frequency esync_freq_ranges[] = {
DPLL_PIN_FREQUENCY_RANGE(0, 1),
};
/**
* zl3073x_dpll_is_input_pin - check if the pin is input one
* @pin: pin to check
*
* Return: true if pin is input, false if pin is output.
*/
static bool
zl3073x_dpll_is_input_pin(struct zl3073x_dpll_pin *pin)
{
return pin->dir == DPLL_PIN_DIRECTION_INPUT;
}
/**
* zl3073x_dpll_is_p_pin - check if the pin is P-pin
* @pin: pin to check
*
* Return: true if the pin is P-pin, false if it is N-pin
*/
static bool
zl3073x_dpll_is_p_pin(struct zl3073x_dpll_pin *pin)
{
return zl3073x_is_p_pin(pin->id);
}
static int
zl3073x_dpll_pin_direction_get(const struct dpll_pin *dpll_pin, void *pin_priv,
const struct dpll_device *dpll, void *dpll_priv,
enum dpll_pin_direction *direction,
struct netlink_ext_ack *extack)
{
struct zl3073x_dpll_pin *pin = pin_priv;
*direction = pin->dir;
return 0;
}
static struct zl3073x_dpll_pin *
zl3073x_dpll_pin_get_by_ref(struct zl3073x_dpll *zldpll, u8 ref_id)
{
struct zl3073x_dpll_pin *pin;
list_for_each_entry(pin, &zldpll->pins, list) {
if (zl3073x_dpll_is_input_pin(pin) &&
zl3073x_input_pin_ref_get(pin->id) == ref_id)
return pin;
}
return NULL;
}
static int
zl3073x_dpll_input_pin_esync_get(const struct dpll_pin *dpll_pin,
void *pin_priv,
const struct dpll_device *dpll,
void *dpll_priv,
struct dpll_pin_esync *esync,
struct netlink_ext_ack *extack)
{
struct zl3073x_dpll *zldpll = dpll_priv;
struct zl3073x_dev *zldev = zldpll->dev;
struct zl3073x_dpll_pin *pin = pin_priv;
const struct zl3073x_ref *ref;
u8 ref_id;
Annotation
- Immediate include surface: `linux/atomic.h`, `linux/bits.h`, `linux/bitfield.h`, `linux/bug.h`, `linux/container_of.h`, `linux/dev_printk.h`, `linux/dpll.h`, `linux/err.h`.
- Detected declarations: `struct zl3073x_dpll_pin`, `function zl3073x_dpll_is_input_pin`, `function zl3073x_dpll_is_p_pin`, `function zl3073x_dpll_pin_direction_get`, `function zl3073x_dpll_pin_get_by_ref`, `function list_for_each_entry`, `function zl3073x_dpll_input_pin_esync_get`, `function zl3073x_dpll_input_pin_esync_set`, `function zl3073x_dpll_input_pin_ref_sync_get`, `function zl3073x_dpll_input_pin_ref_sync_set`.
- Atlas domain: Driver Families / drivers/dpll.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.