drivers/dpll/zl3073x/prop.h

File Facts

System

Linux kernel

Corpus path

drivers/dpll/zl3073x/prop.h

Extension

.h

Size

817 bytes

Lines

35

Domain

Driver Families

Bucket

drivers/dpll

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• linux/dpll.h
• core.h

Detected Declarations

• struct fwnode_handle
• struct zl3073x_pin_props

Annotated Snippet

struct zl3073x_pin_props {
	struct fwnode_handle		*fwnode;
	struct dpll_pin_properties	dpll_props;
	char				package_label[8];
	bool				esync_control;
};

enum dpll_type zl3073x_prop_dpll_type_get(struct zl3073x_dev *zldev, u8 index);

struct zl3073x_pin_props *zl3073x_pin_props_get(struct zl3073x_dev *zldev,
						enum dpll_pin_direction dir,
						u8 index);

void zl3073x_pin_props_put(struct zl3073x_pin_props *props);

#endif /* _ZL3073X_PROP_H */

Annotation

• Immediate include surface: `linux/dpll.h`, `core.h`.
• Detected declarations: `struct fwnode_handle`, `struct zl3073x_pin_props`.
• Atlas domain: Driver Families / drivers/dpll.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.