drivers/edac/pnd2_edac.h

Source file repositories/reference/linux-study-clean/drivers/edac/pnd2_edac.h

File Facts

System
Linux kernel
Corpus path
drivers/edac/pnd2_edac.h
Extension
.h
Size
5751 bytes
Lines
294
Domain
Driver Families
Bucket
drivers/edac
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct b_cr_touud_lo_pci {
	u32	lock : 1;
	u32	reserved_1 : 19;
	u32	touud : 12;
};

#define b_cr_touud_lo_pci_port 0x4c
#define b_cr_touud_lo_pci_offset 0xa8
#define b_cr_touud_lo_pci_r_opcode 0x04

struct b_cr_touud_hi_pci {
	u32	touud : 7;
	u32	reserved_0 : 25;
};

#define b_cr_touud_hi_pci_port 0x4c
#define b_cr_touud_hi_pci_offset 0xac
#define b_cr_touud_hi_pci_r_opcode 0x04

struct b_cr_tolud_pci {
	u32	lock : 1;
	u32	reserved_0 : 19;
	u32	tolud : 12;
};

#define b_cr_tolud_pci_port 0x4c
#define b_cr_tolud_pci_offset 0xbc
#define b_cr_tolud_pci_r_opcode 0x04

struct b_cr_mchbar_lo_pci {
	u32 enable : 1;
	u32 pad_3_1 : 3;
	u32 pad_14_4: 11;
	u32 base: 17;
};

struct b_cr_mchbar_hi_pci {
	u32 base : 7;
	u32 pad_31_7 : 25;
};

/* Symmetric region */
struct b_cr_slice_channel_hash {
	u64	slice_1_disabled : 1;
	u64	hvm_mode : 1;
	u64	interleave_mode : 2;
	u64	slice_0_mem_disabled : 1;
	u64	reserved_0 : 1;
	u64	slice_hash_mask : 14;
	u64	reserved_1 : 11;
	u64	enable_pmi_dual_data_mode : 1;
	u64	ch_1_disabled : 1;
	u64	reserved_2 : 1;
	u64	sym_slice0_channel_enabled : 2;
	u64	sym_slice1_channel_enabled : 2;
	u64	ch_hash_mask : 14;
	u64	reserved_3 : 11;
	u64	lock : 1;
};

#define b_cr_slice_channel_hash_port 0x4c
#define b_cr_slice_channel_hash_offset 0x4c58
#define b_cr_slice_channel_hash_r_opcode 0x06

struct b_cr_mot_out_base_mchbar {
	u32	reserved_0 : 14;
	u32	mot_out_base : 15;
	u32	reserved_1 : 1;
	u32	tr_en : 1;
	u32	imr_en : 1;
};

#define b_cr_mot_out_base_mchbar_port 0x4c
#define b_cr_mot_out_base_mchbar_offset 0x6af0
#define b_cr_mot_out_base_mchbar_r_opcode 0x00

struct b_cr_mot_out_mask_mchbar {
	u32	reserved_0 : 14;
	u32	mot_out_mask : 15;
	u32	reserved_1 : 1;
	u32	ia_iwb_en : 1;
	u32	gt_iwb_en : 1;
};

#define b_cr_mot_out_mask_mchbar_port 0x4c
#define b_cr_mot_out_mask_mchbar_offset 0x6af4
#define b_cr_mot_out_mask_mchbar_r_opcode 0x00

struct b_cr_asym_mem_region0_mchbar {
	u32	pad : 4;

Annotation

Implementation Notes