drivers/firmware/tegra/ivc.c
Source file repositories/reference/linux-study-clean/drivers/firmware/tegra/ivc.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/firmware/tegra/ivc.c- Extension
.c- Size
- 19691 bytes
- Lines
- 722
- Domain
- Driver Families
- Bucket
- drivers/firmware
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
soc/tegra/ivc.h
Detected Declarations
struct tegra_ivc_headerenum tegra_ivc_statefunction tegra_ivc_invalidatefunction tegra_ivc_flushfunction tegra_ivc_emptyfunction tegra_ivc_fullfunction tegra_ivc_availablefunction tegra_ivc_advance_txfunction tegra_ivc_advance_rxfunction tegra_ivc_check_readfunction tegra_ivc_check_writefunction tegra_ivc_frame_virtfunction tegra_ivc_frame_physfunction tegra_ivc_invalidate_framefunction tegra_ivc_flush_framefunction tegra_ivc_read_get_next_framefunction tegra_ivc_read_advancefunction tegra_ivc_write_get_next_framefunction tegra_ivc_write_advancefunction tegra_ivc_resetfunction tegra_ivc_notifiedfunction tegra_ivc_alignfunction tegra_ivc_total_queue_sizefunction tegra_ivc_check_paramsfunction iosys_map_copyfunction iosys_map_get_addressfunction tegra_ivc_initfunction tegra_ivc_cleanupexport tegra_ivc_read_get_next_frameexport tegra_ivc_read_advanceexport tegra_ivc_write_get_next_frameexport tegra_ivc_write_advanceexport tegra_ivc_resetexport tegra_ivc_notifiedexport tegra_ivc_alignexport tegra_ivc_total_queue_sizeexport tegra_ivc_initexport tegra_ivc_cleanup
Annotated Snippet
struct tegra_ivc_header {
union {
struct {
/* fields owned by the transmitting end */
u32 count;
u32 state;
};
u8 pad[TEGRA_IVC_ALIGN];
} tx;
union {
/* fields owned by the receiving end */
u32 count;
u8 pad[TEGRA_IVC_ALIGN];
} rx;
};
#define tegra_ivc_header_read_field(hdr, field) \
iosys_map_rd_field(hdr, 0, struct tegra_ivc_header, field)
#define tegra_ivc_header_write_field(hdr, field, value) \
iosys_map_wr_field(hdr, 0, struct tegra_ivc_header, field, value)
static inline void tegra_ivc_invalidate(struct tegra_ivc *ivc, dma_addr_t phys)
{
if (!ivc->peer)
return;
dma_sync_single_for_cpu(ivc->peer, phys, TEGRA_IVC_ALIGN,
DMA_FROM_DEVICE);
}
static inline void tegra_ivc_flush(struct tegra_ivc *ivc, dma_addr_t phys)
{
if (!ivc->peer)
return;
dma_sync_single_for_device(ivc->peer, phys, TEGRA_IVC_ALIGN,
DMA_TO_DEVICE);
}
static inline bool tegra_ivc_empty(struct tegra_ivc *ivc, struct iosys_map *map)
{
/*
* This function performs multiple checks on the same values with
* security implications, so create snapshots with READ_ONCE() to
* ensure that these checks use the same values.
*/
u32 tx = tegra_ivc_header_read_field(map, tx.count);
u32 rx = tegra_ivc_header_read_field(map, rx.count);
/*
* Perform an over-full check to prevent denial of service attacks
* where a server could be easily fooled into believing that there's
* an extremely large number of frames ready, since receivers are not
* expected to check for full or over-full conditions.
*
* Although the channel isn't empty, this is an invalid case caused by
* a potentially malicious peer, so returning empty is safer, because
* it gives the impression that the channel has gone silent.
*/
if (tx - rx > ivc->num_frames)
return true;
return tx == rx;
}
static inline bool tegra_ivc_full(struct tegra_ivc *ivc, struct iosys_map *map)
{
u32 tx = tegra_ivc_header_read_field(map, tx.count);
u32 rx = tegra_ivc_header_read_field(map, rx.count);
/*
* Invalid cases where the counters indicate that the queue is over
* capacity also appear full.
*/
return tx - rx >= ivc->num_frames;
}
static inline u32 tegra_ivc_available(struct tegra_ivc *ivc, struct iosys_map *map)
{
u32 tx = tegra_ivc_header_read_field(map, tx.count);
u32 rx = tegra_ivc_header_read_field(map, rx.count);
/*
* This function isn't expected to be used in scenarios where an
* over-full situation can lead to denial of service attacks. See the
* comment in tegra_ivc_empty() for an explanation about special
* over-full considerations.
Annotation
- Immediate include surface: `soc/tegra/ivc.h`.
- Detected declarations: `struct tegra_ivc_header`, `enum tegra_ivc_state`, `function tegra_ivc_invalidate`, `function tegra_ivc_flush`, `function tegra_ivc_empty`, `function tegra_ivc_full`, `function tegra_ivc_available`, `function tegra_ivc_advance_tx`, `function tegra_ivc_advance_rx`, `function tegra_ivc_check_read`.
- Atlas domain: Driver Families / drivers/firmware.
- Implementation status: integration implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.