drivers/fpga/altera-hps2fpga.c
Source file repositories/reference/linux-study-clean/drivers/fpga/altera-hps2fpga.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/fpga/altera-hps2fpga.c- Extension
.c- Size
- 5740 bytes
- Lines
- 220
- Domain
- Driver Families
- Bucket
- drivers/fpga
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/clk.hlinux/fpga/fpga-bridge.hlinux/kernel.hlinux/mfd/syscon.hlinux/module.hlinux/of.hlinux/property.hlinux/regmap.hlinux/reset.hlinux/spinlock.h
Detected Declarations
struct altera_hps2fpga_datafunction alt_hps2fpga_enable_showfunction _alt_hps2fpga_enable_setfunction alt_hps2fpga_enable_setfunction alt_fpga_bridge_probefunction alt_fpga_bridge_remove
Annotated Snippet
struct altera_hps2fpga_data {
const char *name;
struct reset_control *bridge_reset;
struct regmap *l3reg;
unsigned int remap_mask;
struct clk *clk;
};
static int alt_hps2fpga_enable_show(struct fpga_bridge *bridge)
{
struct altera_hps2fpga_data *priv = bridge->priv;
return reset_control_status(priv->bridge_reset);
}
/* The L3 REMAP register is write only, so keep a cached value. */
static unsigned int l3_remap_shadow;
static DEFINE_SPINLOCK(l3_remap_lock);
static int _alt_hps2fpga_enable_set(struct altera_hps2fpga_data *priv,
bool enable)
{
unsigned long flags;
int ret;
/* bring bridge out of reset */
if (enable)
ret = reset_control_deassert(priv->bridge_reset);
else
ret = reset_control_assert(priv->bridge_reset);
if (ret)
return ret;
/* Allow bridge to be visible to L3 masters or not */
if (priv->remap_mask) {
spin_lock_irqsave(&l3_remap_lock, flags);
l3_remap_shadow |= ALT_L3_REMAP_MPUZERO_MSK;
if (enable)
l3_remap_shadow |= priv->remap_mask;
else
l3_remap_shadow &= ~priv->remap_mask;
ret = regmap_write(priv->l3reg, ALT_L3_REMAP_OFST,
l3_remap_shadow);
spin_unlock_irqrestore(&l3_remap_lock, flags);
}
return ret;
}
static int alt_hps2fpga_enable_set(struct fpga_bridge *bridge, bool enable)
{
return _alt_hps2fpga_enable_set(bridge->priv, enable);
}
static const struct fpga_bridge_ops altera_hps2fpga_br_ops = {
.enable_set = alt_hps2fpga_enable_set,
.enable_show = alt_hps2fpga_enable_show,
};
static struct altera_hps2fpga_data hps2fpga_data = {
.name = HPS2FPGA_BRIDGE_NAME,
.remap_mask = ALT_L3_REMAP_H2F_MSK,
};
static struct altera_hps2fpga_data lwhps2fpga_data = {
.name = LWHPS2FPGA_BRIDGE_NAME,
.remap_mask = ALT_L3_REMAP_LWH2F_MSK,
};
static struct altera_hps2fpga_data fpga2hps_data = {
.name = FPGA2HPS_BRIDGE_NAME,
};
static const struct of_device_id altera_fpga_of_match[] = {
{ .compatible = "altr,socfpga-hps2fpga-bridge",
.data = &hps2fpga_data },
{ .compatible = "altr,socfpga-lwhps2fpga-bridge",
.data = &lwhps2fpga_data },
{ .compatible = "altr,socfpga-fpga2hps-bridge",
.data = &fpga2hps_data },
{},
};
static int alt_fpga_bridge_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct altera_hps2fpga_data *priv;
struct fpga_bridge *br;
Annotation
- Immediate include surface: `linux/clk.h`, `linux/fpga/fpga-bridge.h`, `linux/kernel.h`, `linux/mfd/syscon.h`, `linux/module.h`, `linux/of.h`, `linux/property.h`, `linux/regmap.h`.
- Detected declarations: `struct altera_hps2fpga_data`, `function alt_hps2fpga_enable_show`, `function _alt_hps2fpga_enable_set`, `function alt_hps2fpga_enable_set`, `function alt_fpga_bridge_probe`, `function alt_fpga_bridge_remove`.
- Atlas domain: Driver Families / drivers/fpga.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.