drivers/fpga/dfl-fme-br.c
Source file repositories/reference/linux-study-clean/drivers/fpga/dfl-fme-br.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/fpga/dfl-fme-br.c- Extension
.c- Size
- 2467 bytes
- Lines
- 106
- Domain
- Driver Families
- Bucket
- drivers/fpga
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/module.hlinux/fpga/fpga-bridge.hdfl.hdfl-fme-pr.h
Detected Declarations
struct fme_br_privfunction fme_bridge_enable_setfunction fme_br_probefunction fme_br_remove
Annotated Snippet
struct fme_br_priv {
struct dfl_fme_br_pdata *pdata;
struct dfl_fpga_port_ops *port_ops;
struct dfl_feature_dev_data *port_fdata;
};
static int fme_bridge_enable_set(struct fpga_bridge *bridge, bool enable)
{
struct fme_br_priv *priv = bridge->priv;
struct dfl_feature_dev_data *port_fdata;
struct dfl_fpga_port_ops *ops;
if (!priv->port_fdata) {
port_fdata = dfl_fpga_cdev_find_port_data(priv->pdata->cdev,
&priv->pdata->port_id,
dfl_fpga_check_port_id);
if (!port_fdata)
return -ENODEV;
priv->port_fdata = port_fdata;
}
if (priv->port_fdata && !priv->port_ops) {
ops = dfl_fpga_port_ops_get(priv->port_fdata);
if (!ops || !ops->enable_set)
return -ENOENT;
priv->port_ops = ops;
}
return priv->port_ops->enable_set(priv->port_fdata, enable);
}
static const struct fpga_bridge_ops fme_bridge_ops = {
.enable_set = fme_bridge_enable_set,
};
static int fme_br_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct fme_br_priv *priv;
struct fpga_bridge *br;
priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
if (!priv)
return -ENOMEM;
priv->pdata = dev_get_platdata(dev);
br = fpga_bridge_register(dev, "DFL FPGA FME Bridge",
&fme_bridge_ops, priv);
if (IS_ERR(br))
return PTR_ERR(br);
platform_set_drvdata(pdev, br);
return 0;
}
static void fme_br_remove(struct platform_device *pdev)
{
struct fpga_bridge *br = platform_get_drvdata(pdev);
struct fme_br_priv *priv = br->priv;
fpga_bridge_unregister(br);
if (priv->port_ops)
dfl_fpga_port_ops_put(priv->port_ops);
}
static struct platform_driver fme_br_driver = {
.driver = {
.name = DFL_FPGA_FME_BRIDGE,
},
.probe = fme_br_probe,
.remove = fme_br_remove,
};
module_platform_driver(fme_br_driver);
MODULE_DESCRIPTION("FPGA Bridge for DFL FPGA Management Engine");
MODULE_AUTHOR("Intel Corporation");
MODULE_LICENSE("GPL v2");
MODULE_ALIAS("platform:dfl-fme-bridge");
Annotation
- Immediate include surface: `linux/module.h`, `linux/fpga/fpga-bridge.h`, `dfl.h`, `dfl-fme-pr.h`.
- Detected declarations: `struct fme_br_priv`, `function fme_bridge_enable_set`, `function fme_br_probe`, `function fme_br_remove`.
- Atlas domain: Driver Families / drivers/fpga.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.