drivers/fpga/tests/fpga-bridge-test.c
Source file repositories/reference/linux-study-clean/drivers/fpga/tests/fpga-bridge-test.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/fpga/tests/fpga-bridge-test.c- Extension
.c- Size
- 4502 bytes
- Lines
- 175
- Domain
- Driver Families
- Bucket
- drivers/fpga
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
kunit/device.hkunit/test.hlinux/fpga/fpga-bridge.hlinux/module.hlinux/types.h
Detected Declarations
struct bridge_statsstruct bridge_ctxfunction op_enable_setfunction register_test_bridgefunction fpga_bridge_test_getfunction fpga_bridge_test_togglefunction fpga_bridge_test_get_put_listfunction fpga_bridge_test_init
Annotated Snippet
struct bridge_stats {
bool enable;
};
struct bridge_ctx {
struct fpga_bridge *bridge;
struct device *dev;
struct bridge_stats stats;
};
/*
* Wrapper to avoid a cast warning when passing the action function directly
* to kunit_add_action().
*/
KUNIT_DEFINE_ACTION_WRAPPER(fpga_bridge_unregister_wrapper, fpga_bridge_unregister,
struct fpga_bridge *);
static int op_enable_set(struct fpga_bridge *bridge, bool enable)
{
struct bridge_stats *stats = bridge->priv;
stats->enable = enable;
return 0;
}
/*
* Fake FPGA bridge that implements only the enable_set op to track
* the state.
*/
static const struct fpga_bridge_ops fake_bridge_ops = {
.enable_set = op_enable_set,
};
/**
* register_test_bridge() - Register a fake FPGA bridge for testing.
* @test: KUnit test context object.
* @dev_name: name of the kunit device to be registered
*
* Return: Context of the newly registered FPGA bridge.
*/
static struct bridge_ctx *register_test_bridge(struct kunit *test, const char *dev_name)
{
struct bridge_ctx *ctx;
int ret;
ctx = kunit_kzalloc(test, sizeof(*ctx), GFP_KERNEL);
KUNIT_ASSERT_NOT_ERR_OR_NULL(test, ctx);
ctx->dev = kunit_device_register(test, dev_name);
KUNIT_ASSERT_NOT_ERR_OR_NULL(test, ctx->dev);
ctx->bridge = fpga_bridge_register(ctx->dev, "Fake FPGA bridge", &fake_bridge_ops,
&ctx->stats);
KUNIT_ASSERT_FALSE(test, IS_ERR_OR_NULL(ctx->bridge));
ret = kunit_add_action_or_reset(test, fpga_bridge_unregister_wrapper, ctx->bridge);
KUNIT_ASSERT_EQ(test, ret, 0);
return ctx;
}
static void fpga_bridge_test_get(struct kunit *test)
{
struct bridge_ctx *ctx = test->priv;
struct fpga_bridge *bridge;
bridge = fpga_bridge_get(ctx->dev, NULL);
KUNIT_EXPECT_PTR_EQ(test, bridge, ctx->bridge);
bridge = fpga_bridge_get(ctx->dev, NULL);
KUNIT_EXPECT_EQ(test, PTR_ERR(bridge), -EBUSY);
fpga_bridge_put(ctx->bridge);
}
static void fpga_bridge_test_toggle(struct kunit *test)
{
struct bridge_ctx *ctx = test->priv;
int ret;
ret = fpga_bridge_disable(ctx->bridge);
KUNIT_EXPECT_EQ(test, ret, 0);
KUNIT_EXPECT_FALSE(test, ctx->stats.enable);
ret = fpga_bridge_enable(ctx->bridge);
KUNIT_EXPECT_EQ(test, ret, 0);
KUNIT_EXPECT_TRUE(test, ctx->stats.enable);
}
Annotation
- Immediate include surface: `kunit/device.h`, `kunit/test.h`, `linux/fpga/fpga-bridge.h`, `linux/module.h`, `linux/types.h`.
- Detected declarations: `struct bridge_stats`, `struct bridge_ctx`, `function op_enable_set`, `function register_test_bridge`, `function fpga_bridge_test_get`, `function fpga_bridge_test_toggle`, `function fpga_bridge_test_get_put_list`, `function fpga_bridge_test_init`.
- Atlas domain: Driver Families / drivers/fpga.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.