drivers/fpga/tests/fpga-region-test.c
Source file repositories/reference/linux-study-clean/drivers/fpga/tests/fpga-region-test.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/fpga/tests/fpga-region-test.c- Extension
.c- Size
- 5934 bytes
- Lines
- 219
- Domain
- Driver Families
- Bucket
- drivers/fpga
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
kunit/device.hkunit/test.hlinux/fpga/fpga-bridge.hlinux/fpga/fpga-mgr.hlinux/fpga/fpga-region.hlinux/module.hlinux/types.h
Detected Declarations
struct mgr_statsstruct bridge_statsstruct test_ctxfunction op_writefunction op_enable_setfunction fake_region_get_bridgesfunction fake_region_matchfunction fpga_region_test_class_findfunction fpga_region_test_program_fpgafunction tested
Annotated Snippet
struct mgr_stats {
u32 write_count;
};
struct bridge_stats {
bool enable;
u32 cycles_count;
};
struct test_ctx {
struct fpga_manager *mgr;
struct device *mgr_dev;
struct fpga_bridge *bridge;
struct device *bridge_dev;
struct fpga_region *region;
struct device *region_dev;
struct bridge_stats bridge_stats;
struct mgr_stats mgr_stats;
};
/*
* Wrappers to avoid cast warnings when passing action functions directly
* to kunit_add_action().
*/
KUNIT_DEFINE_ACTION_WRAPPER(fpga_image_info_free_wrapper, fpga_image_info_free,
struct fpga_image_info *);
KUNIT_DEFINE_ACTION_WRAPPER(fpga_bridge_unregister_wrapper, fpga_bridge_unregister,
struct fpga_bridge *);
KUNIT_DEFINE_ACTION_WRAPPER(fpga_region_unregister_wrapper, fpga_region_unregister,
struct fpga_region *);
static int op_write(struct fpga_manager *mgr, const char *buf, size_t count)
{
struct mgr_stats *stats = mgr->priv;
stats->write_count++;
return 0;
}
/*
* Fake FPGA manager that implements only the write op to count the number
* of programming cycles. The internals of the programming sequence are
* tested in the Manager suite since they are outside the responsibility
* of the Region.
*/
static const struct fpga_manager_ops fake_mgr_ops = {
.write = op_write,
};
static int op_enable_set(struct fpga_bridge *bridge, bool enable)
{
struct bridge_stats *stats = bridge->priv;
if (!stats->enable && enable)
stats->cycles_count++;
stats->enable = enable;
return 0;
}
/*
* Fake FPGA bridge that implements only enable_set op to count the number
* of activation cycles.
*/
static const struct fpga_bridge_ops fake_bridge_ops = {
.enable_set = op_enable_set,
};
static int fake_region_get_bridges(struct fpga_region *region)
{
struct fpga_bridge *bridge = region->priv;
return fpga_bridge_get_to_list(bridge->dev.parent, region->info, ®ion->bridge_list);
}
static int fake_region_match(struct device *dev, const void *data)
{
return dev->parent == data;
}
static void fpga_region_test_class_find(struct kunit *test)
{
struct test_ctx *ctx = test->priv;
struct fpga_region *region;
region = fpga_region_class_find(NULL, ctx->region_dev, fake_region_match);
Annotation
- Immediate include surface: `kunit/device.h`, `kunit/test.h`, `linux/fpga/fpga-bridge.h`, `linux/fpga/fpga-mgr.h`, `linux/fpga/fpga-region.h`, `linux/module.h`, `linux/types.h`.
- Detected declarations: `struct mgr_stats`, `struct bridge_stats`, `struct test_ctx`, `function op_write`, `function op_enable_set`, `function fake_region_get_bridges`, `function fake_region_match`, `function fpga_region_test_class_find`, `function fpga_region_test_program_fpga`, `function tested`.
- Atlas domain: Driver Families / drivers/fpga.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.