drivers/fpga/xilinx-selectmap.c
Source file repositories/reference/linux-study-clean/drivers/fpga/xilinx-selectmap.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/fpga/xilinx-selectmap.c- Extension
.c- Size
- 2617 bytes
- Lines
- 96
- Domain
- Driver Families
- Bucket
- drivers/fpga
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
xilinx-core.hlinux/gpio/consumer.hlinux/io.hlinux/module.hlinux/mod_devicetable.hlinux/of.hlinux/platform_device.h
Detected Declarations
struct xilinx_selectmap_conffunction xilinx_selectmap_writefunction xilinx_selectmap_probe
Annotated Snippet
struct xilinx_selectmap_conf {
struct xilinx_fpga_core core;
void __iomem *base;
};
#define to_xilinx_selectmap_conf(obj) \
container_of(obj, struct xilinx_selectmap_conf, core)
static int xilinx_selectmap_write(struct xilinx_fpga_core *core,
const char *buf, size_t count)
{
struct xilinx_selectmap_conf *conf = to_xilinx_selectmap_conf(core);
size_t i;
for (i = 0; i < count; ++i)
writeb(buf[i], conf->base);
return 0;
}
static int xilinx_selectmap_probe(struct platform_device *pdev)
{
struct xilinx_selectmap_conf *conf;
struct gpio_desc *gpio;
void __iomem *base;
conf = devm_kzalloc(&pdev->dev, sizeof(*conf), GFP_KERNEL);
if (!conf)
return -ENOMEM;
conf->core.dev = &pdev->dev;
conf->core.write = xilinx_selectmap_write;
base = devm_platform_get_and_ioremap_resource(pdev, 0, NULL);
if (IS_ERR(base))
return dev_err_probe(&pdev->dev, PTR_ERR(base),
"ioremap error\n");
conf->base = base;
/* CSI_B is active low */
gpio = devm_gpiod_get_optional(&pdev->dev, "csi", GPIOD_OUT_HIGH);
if (IS_ERR(gpio))
return dev_err_probe(&pdev->dev, PTR_ERR(gpio),
"Failed to get CSI_B gpio\n");
/* RDWR_B is active low */
gpio = devm_gpiod_get_optional(&pdev->dev, "rdwr", GPIOD_OUT_HIGH);
if (IS_ERR(gpio))
return dev_err_probe(&pdev->dev, PTR_ERR(gpio),
"Failed to get RDWR_B gpio\n");
return xilinx_core_probe(&conf->core);
}
static const struct of_device_id xlnx_selectmap_of_match[] = {
{ .compatible = "xlnx,fpga-xc7s-selectmap", }, // Spartan-7
{ .compatible = "xlnx,fpga-xc7a-selectmap", }, // Artix-7
{ .compatible = "xlnx,fpga-xc7k-selectmap", }, // Kintex-7
{ .compatible = "xlnx,fpga-xc7v-selectmap", }, // Virtex-7
{},
};
MODULE_DEVICE_TABLE(of, xlnx_selectmap_of_match);
static struct platform_driver xilinx_selectmap_driver = {
.driver = {
.name = "xilinx-selectmap",
.of_match_table = xlnx_selectmap_of_match,
},
.probe = xilinx_selectmap_probe,
};
module_platform_driver(xilinx_selectmap_driver);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Charles Perry <charles.perry@savoirfairelinux.com>");
MODULE_DESCRIPTION("Load Xilinx FPGA firmware over SelectMap");
Annotation
- Immediate include surface: `xilinx-core.h`, `linux/gpio/consumer.h`, `linux/io.h`, `linux/module.h`, `linux/mod_devicetable.h`, `linux/of.h`, `linux/platform_device.h`.
- Detected declarations: `struct xilinx_selectmap_conf`, `function xilinx_selectmap_write`, `function xilinx_selectmap_probe`.
- Atlas domain: Driver Families / drivers/fpga.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.