drivers/gpib/tms9914/tms9914.c

Source file repositories/reference/linux-study-clean/drivers/gpib/tms9914/tms9914.c

File Facts

System
Linux kernel
Corpus path
drivers/gpib/tms9914/tms9914.c
Extension
.c
Size
24576 bytes
Lines
902
Domain
Driver Families
Bucket
drivers/gpib
Inferred role
Driver Families: exported/initcall integration point
Status
integration implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

switch (command_byte) {
		case PP_CONFIG:
			priv->ppoll_configure_state = 1;
			/*
			 * AUX_PTS generates another UNC interrupt on the next command byte
			 * if it is in the secondary address group (such as PPE and PPD).
			 */
			write_byte(priv, AUX_PTS, AUXCR);
			write_byte(priv, AUX_VAL, AUXCR);
			break;
		case PPU:
			tms9914_parallel_poll_configure(board, priv, command_byte);
			write_byte(priv, AUX_VAL, AUXCR);
			break;
		default:
			if (is_PPE(command_byte) || is_PPD(command_byte)) {
				if (priv->ppoll_configure_state) {
					tms9914_parallel_poll_configure(board, priv, command_byte);
					write_byte(priv, AUX_VAL, AUXCR);
				} else	{// bad parallel poll configure byte
					// clear dac holdoff
					write_byte(priv, AUX_INVAL, AUXCR);
				}
			} else	{
				// clear dac holdoff
				write_byte(priv, AUX_INVAL, AUXCR);
			}
			break;
		}

		if (in_primary_command_group(command_byte) && command_byte != PP_CONFIG)
			priv->ppoll_configure_state = 0;
	}

	if (status1 & HR_ERR) {
		dev_dbg(board->gpib_dev, "gpib bus error\n");
		set_bit(BUS_ERROR_BN, &priv->state);
	}

	if (status1 & HR_IFC) {
		push_gpib_event(board, EVENT_IFC);
		clear_bit(CIC_NUM, &board->status);
	}

	if (status1 & HR_GET) {
		push_gpib_event(board, EVENT_DEV_TRG);
		// clear dac holdoff
		write_byte(priv, AUX_VAL, AUXCR);
	}

	if (status1 & HR_DCAS) {
		push_gpib_event(board, EVENT_DEV_CLR);
		// clear dac holdoff
		write_byte(priv, AUX_VAL, AUXCR);
		set_bit(DEV_CLEAR_BN, &priv->state);
	}

	// check for being addressed with secondary addressing
	if (status1 & HR_APT) {
		if (board->sad < 0)
			dev_err(board->gpib_dev, "bug, APT interrupt without secondary addressing?\n");
		if ((read_byte(priv, CPTR) & gpib_command_mask) == MSA(board->sad))
			write_byte(priv, AUX_VAL, AUXCR);
		else
			write_byte(priv, AUX_INVAL, AUXCR);
	}

	if ((status0 & priv->imr0_bits) || (status1 & priv->imr1_bits))	{
		dev_dbg(board->gpib_dev, "isr0 0x%x, imr0 0x%x, isr1 0x%x, imr1 0x%x\n",
			status0, priv->imr0_bits, status1, priv->imr1_bits);
		update_status_nolock(board, priv);
		wake_up_interruptible(&board->wait);
	}
	return IRQ_HANDLED;
}
EXPORT_SYMBOL(tms9914_interrupt_have_status);

void tms9914_board_reset(struct tms9914_priv *priv)
{
	/* chip reset */
	write_byte(priv, AUX_CHIP_RESET | AUX_CS, AUXCR);

	/* disable all interrupts */
	priv->imr0_bits = 0;
	write_byte(priv, priv->imr0_bits, IMR0);
	priv->imr1_bits = 0;
	write_byte(priv, priv->imr1_bits, IMR1);
	write_byte(priv, AUX_DAI | AUX_CS, AUXCR);

	/* clear registers by reading */

Annotation

Implementation Notes