drivers/gpio/gpio-em.c
Source file repositories/reference/linux-study-clean/drivers/gpio/gpio-em.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpio/gpio-em.c- Extension
.c- Size
- 9440 bytes
- Lines
- 388
- Domain
- Driver Families
- Bucket
- drivers/gpio
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/init.hlinux/platform_device.hlinux/spinlock.hlinux/interrupt.hlinux/ioport.hlinux/io.hlinux/irq.hlinux/irqdomain.hlinux/bitops.hlinux/err.hlinux/gpio/driver.hlinux/slab.hlinux/module.hlinux/pinctrl/consumer.h
Detected Declarations
struct em_gio_privfunction em_gio_readfunction em_gio_writefunction em_gio_irq_disablefunction em_gio_irq_enablefunction em_gio_irq_reqresfunction em_gio_irq_relresfunction em_gio_irq_set_typefunction em_gio_irq_handlerfunction em_gio_direction_inputfunction em_gio_getfunction __em_gio_setfunction em_gio_setfunction em_gio_direction_outputfunction em_gio_to_irqfunction em_gio_freefunction em_gio_irq_domain_mapfunction em_gio_irq_domain_removefunction em_gio_probefunction em_gio_initfunction em_gio_exit
Annotated Snippet
struct em_gio_priv {
void __iomem *base0;
void __iomem *base1;
spinlock_t sense_lock;
struct platform_device *pdev;
struct gpio_chip gpio_chip;
struct irq_chip irq_chip;
struct irq_domain *irq_domain;
};
#define GIO_E1 0x00
#define GIO_E0 0x04
#define GIO_EM 0x04
#define GIO_OL 0x08
#define GIO_OH 0x0c
#define GIO_I 0x10
#define GIO_IIA 0x14
#define GIO_IEN 0x18
#define GIO_IDS 0x1c
#define GIO_IIM 0x1c
#define GIO_RAW 0x20
#define GIO_MST 0x24
#define GIO_IIR 0x28
#define GIO_IDT0 0x40
#define GIO_IDT1 0x44
#define GIO_IDT2 0x48
#define GIO_IDT3 0x4c
#define GIO_RAWBL 0x50
#define GIO_RAWBH 0x54
#define GIO_IRBL 0x58
#define GIO_IRBH 0x5c
#define GIO_IDT(n) (GIO_IDT0 + ((n) * 4))
static inline unsigned long em_gio_read(struct em_gio_priv *p, int offs)
{
if (offs < GIO_IDT0)
return ioread32(p->base0 + offs);
else
return ioread32(p->base1 + (offs - GIO_IDT0));
}
static inline void em_gio_write(struct em_gio_priv *p, int offs,
unsigned long value)
{
if (offs < GIO_IDT0)
iowrite32(value, p->base0 + offs);
else
iowrite32(value, p->base1 + (offs - GIO_IDT0));
}
static void em_gio_irq_disable(struct irq_data *d)
{
struct em_gio_priv *p = irq_data_get_irq_chip_data(d);
em_gio_write(p, GIO_IDS, BIT(irqd_to_hwirq(d)));
}
static void em_gio_irq_enable(struct irq_data *d)
{
struct em_gio_priv *p = irq_data_get_irq_chip_data(d);
em_gio_write(p, GIO_IEN, BIT(irqd_to_hwirq(d)));
}
static int em_gio_irq_reqres(struct irq_data *d)
{
struct em_gio_priv *p = irq_data_get_irq_chip_data(d);
int ret;
ret = gpiochip_lock_as_irq(&p->gpio_chip, irqd_to_hwirq(d));
if (ret) {
dev_err(p->gpio_chip.parent,
"unable to lock HW IRQ %lu for IRQ\n",
irqd_to_hwirq(d));
return ret;
}
return 0;
}
static void em_gio_irq_relres(struct irq_data *d)
{
struct em_gio_priv *p = irq_data_get_irq_chip_data(d);
gpiochip_unlock_as_irq(&p->gpio_chip, irqd_to_hwirq(d));
}
#define GIO_ASYNC(x) (x + 8)
Annotation
- Immediate include surface: `linux/init.h`, `linux/platform_device.h`, `linux/spinlock.h`, `linux/interrupt.h`, `linux/ioport.h`, `linux/io.h`, `linux/irq.h`, `linux/irqdomain.h`.
- Detected declarations: `struct em_gio_priv`, `function em_gio_read`, `function em_gio_write`, `function em_gio_irq_disable`, `function em_gio_irq_enable`, `function em_gio_irq_reqres`, `function em_gio_irq_relres`, `function em_gio_irq_set_type`, `function em_gio_irq_handler`, `function em_gio_direction_input`.
- Atlas domain: Driver Families / drivers/gpio.
- Implementation status: integration implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.