drivers/gpio/gpio-mvebu.c
Source file repositories/reference/linux-study-clean/drivers/gpio/gpio-mvebu.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpio/gpio-mvebu.c- Extension
.c- Size
- 34674 bytes
- Lines
- 1308
- Domain
- Driver Families
- Bucket
- drivers/gpio
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitops.hlinux/clk.hlinux/err.hlinux/gpio/driver.hlinux/gpio/consumer.hlinux/gpio/machine.hlinux/init.hlinux/io.hlinux/irq.hlinux/irqchip/chained_irq.hlinux/irqdomain.hlinux/mfd/syscon.hlinux/of.hlinux/pinctrl/consumer.hlinux/platform_device.hlinux/property.hlinux/pwm.hlinux/regmap.hlinux/slab.hlinux/string_choices.hlinux/seq_file.h
Detected Declarations
struct mvebu_pwmstruct mvebu_gpio_chipfunction mvebu_gpioreg_edge_causefunction mvebu_gpio_read_edge_causefunction mvebu_gpio_write_edge_causefunction mvebu_gpioreg_edge_maskfunction mvebu_gpio_read_edge_maskfunction mvebu_gpio_write_edge_maskfunction mvebu_gpioreg_level_maskfunction mvebu_gpio_read_level_maskfunction mvebu_gpio_write_level_maskfunction mvebu_pwmreg_blink_on_durationfunction mvebu_pwmreg_blink_off_durationfunction mvebu_gpio_setfunction mvebu_gpio_getfunction mvebu_gpio_blinkfunction mvebu_gpio_direction_inputfunction mvebu_gpio_direction_outputfunction mvebu_gpio_get_directionfunction mvebu_gpio_to_irqfunction mvebu_gpio_irq_ackfunction mvebu_gpio_edge_irq_maskfunction mvebu_gpio_edge_irq_unmaskfunction mvebu_gpio_level_irq_maskfunction mvebu_gpio_level_irq_unmaskfunction groupedfunction mvebu_gpio_irq_handlerfunction mvebu_pwm_requestfunction mvebu_pwm_freefunction mvebu_pwm_get_statefunction mvebu_pwm_applyfunction mvebu_pwm_suspendfunction mvebu_pwm_resumefunction mvebu_pwm_probefunction mvebu_gpio_dbg_showfunction for_each_requested_gpiofunction mvebu_gpio_suspendfunction mvebu_gpio_resumefunction mvebu_gpio_probe_rawfunction mvebu_gpio_probe_sysconfunction mvebu_gpio_remove_irq_domainfunction mvebu_gpio_probe
Annotated Snippet
struct mvebu_pwm {
struct regmap *regs;
u32 offset;
unsigned long clk_rate;
struct gpio_desc *gpiod;
spinlock_t lock;
struct mvebu_gpio_chip *mvchip;
/* Used to preserve GPIO/PWM registers across suspend/resume */
u32 blink_select;
u32 blink_on_duration;
u32 blink_off_duration;
};
struct mvebu_gpio_chip {
struct gpio_chip chip;
struct regmap *regs;
u32 offset;
struct regmap *percpu_regs;
int irqbase;
struct irq_domain *domain;
int soc_variant;
/* Used for PWM support */
struct clk *clk;
struct mvebu_pwm *mvpwm;
/* Used to preserve GPIO registers across suspend/resume */
u32 out_reg;
u32 io_conf_reg;
u32 blink_en_reg;
u32 in_pol_reg;
u32 edge_mask_regs[4];
u32 level_mask_regs[4];
};
/*
* Functions returning addresses of individual registers for a given
* GPIO controller.
*/
static void mvebu_gpioreg_edge_cause(struct mvebu_gpio_chip *mvchip,
struct regmap **map, unsigned int *offset)
{
int cpu;
switch (mvchip->soc_variant) {
case MVEBU_GPIO_SOC_VARIANT_ORION:
case MVEBU_GPIO_SOC_VARIANT_MV78200:
case MVEBU_GPIO_SOC_VARIANT_A8K:
*map = mvchip->regs;
*offset = GPIO_EDGE_CAUSE_OFF + mvchip->offset;
break;
case MVEBU_GPIO_SOC_VARIANT_ARMADAXP:
cpu = smp_processor_id();
*map = mvchip->percpu_regs;
*offset = GPIO_EDGE_CAUSE_ARMADAXP_OFF(cpu);
break;
default:
BUG();
}
}
static u32
mvebu_gpio_read_edge_cause(struct mvebu_gpio_chip *mvchip)
{
struct regmap *map;
unsigned int offset;
u32 val;
mvebu_gpioreg_edge_cause(mvchip, &map, &offset);
regmap_read(map, offset, &val);
return val;
}
static void
mvebu_gpio_write_edge_cause(struct mvebu_gpio_chip *mvchip, u32 val)
{
struct regmap *map;
unsigned int offset;
mvebu_gpioreg_edge_cause(mvchip, &map, &offset);
regmap_write(map, offset, val);
}
static inline void
mvebu_gpioreg_edge_mask(struct mvebu_gpio_chip *mvchip,
struct regmap **map, unsigned int *offset)
{
Annotation
- Immediate include surface: `linux/bitops.h`, `linux/clk.h`, `linux/err.h`, `linux/gpio/driver.h`, `linux/gpio/consumer.h`, `linux/gpio/machine.h`, `linux/init.h`, `linux/io.h`.
- Detected declarations: `struct mvebu_pwm`, `struct mvebu_gpio_chip`, `function mvebu_gpioreg_edge_cause`, `function mvebu_gpio_read_edge_cause`, `function mvebu_gpio_write_edge_cause`, `function mvebu_gpioreg_edge_mask`, `function mvebu_gpio_read_edge_mask`, `function mvebu_gpio_write_edge_mask`, `function mvebu_gpioreg_level_mask`, `function mvebu_gpio_read_level_mask`.
- Atlas domain: Driver Families / drivers/gpio.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.