drivers/gpio/gpio-rockchip.c
Source file repositories/reference/linux-study-clean/drivers/gpio/gpio-rockchip.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpio/gpio-rockchip.c- Extension
.c- Size
- 21551 bytes
- Lines
- 843
- Domain
- Driver Families
- Bucket
- drivers/gpio
- Inferred role
- Driver Families: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitops.hlinux/clk.hlinux/device.hlinux/err.hlinux/gpio/driver.hlinux/init.hlinux/interrupt.hlinux/io.hlinux/module.hlinux/of.hlinux/of_address.hlinux/of_irq.hlinux/pinctrl/pinconf-generic.hlinux/platform_device.hlinux/regmap.h../pinctrl/core.h../pinctrl/pinctrl-rockchip.h
Detected Declarations
function gpio_writel_v2function gpio_readl_v2function rockchip_gpio_writelfunction rockchip_gpio_readlfunction rockchip_gpio_writel_bitfunction rockchip_gpio_readl_bitfunction rockchip_gpio_get_directionfunction rockchip_gpio_set_directionfunction rockchip_gpio_setfunction rockchip_gpio_getfunction rockchip_gpio_set_debouncefunction rockchip_gpio_direction_inputfunction rockchip_gpio_direction_outputfunction rockchip_gpio_set_configfunction gpiod_to_irqfunction rockchip_irq_demuxfunction rockchip_irq_set_typefunction rockchip_irq_reqresfunction rockchip_irq_relresfunction rockchip_irq_suspendfunction rockchip_irq_resumefunction rockchip_irq_enablefunction rockchip_irq_disablefunction rockchip_interrupts_registerfunction rockchip_gpiolib_registerfunction gpiochip_add_pin_rangefunction rockchip_clk_putfunction rockchip_get_bank_datafunction rockchip_gpio_find_bankfunction rockchip_gpio_probefunction rockchip_gpio_removefunction rockchip_gpio_initfunction rockchip_gpio_exit
Annotated Snippet
if (div_debounce_support) {
/* Configure the max debounce from consumers */
cur_div_reg = readl(bank->reg_base +
reg->dbclk_div_con);
if (cur_div_reg < div_reg)
writel(div_reg, bank->reg_base +
reg->dbclk_div_con);
rockchip_gpio_writel_bit(bank, offset, 1,
reg->dbclk_div_en);
}
rockchip_gpio_writel_bit(bank, offset, 1, reg->debounce);
} else {
if (div_debounce_support)
rockchip_gpio_writel_bit(bank, offset, 0,
reg->dbclk_div_en);
rockchip_gpio_writel_bit(bank, offset, 0, reg->debounce);
}
raw_spin_unlock_irqrestore(&bank->slock, flags);
/* Enable or disable dbclk at last */
if (div_debounce_support) {
if (debounce)
clk_prepare_enable(bank->db_clk);
else
clk_disable_unprepare(bank->db_clk);
}
return 0;
}
static int rockchip_gpio_direction_input(struct gpio_chip *gc,
unsigned int offset)
{
return rockchip_gpio_set_direction(gc, offset, true);
}
static int rockchip_gpio_direction_output(struct gpio_chip *gc,
unsigned int offset, int value)
{
rockchip_gpio_set(gc, offset, value);
return rockchip_gpio_set_direction(gc, offset, false);
}
/*
* gpiolib set_config callback function. The setting of the pin
* mux function as 'gpio output' will be handled by the pinctrl subsystem
* interface.
*/
static int rockchip_gpio_set_config(struct gpio_chip *gc, unsigned int offset,
unsigned long config)
{
enum pin_config_param param = pinconf_to_config_param(config);
switch (param) {
case PIN_CONFIG_INPUT_DEBOUNCE:
rockchip_gpio_set_debounce(gc, offset, true);
/*
* Rockchip's gpio could only support up to one period
* of the debounce clock(pclk), which is far away from
* satisftying the requirement, as pclk is usually near
* 100MHz shared by all peripherals. So the fact is it
* has crippled debounce capability could only be useful
* to prevent any spurious glitches from waking up the system
* if the gpio is conguired as wakeup interrupt source. Let's
* still return -ENOTSUPP as before, to make sure the caller
* of gpiod_set_debounce won't change its behaviour.
*/
return -ENOTSUPP;
default:
return gpiochip_generic_config(gc, offset, config);
}
}
/*
* gpiod_to_irq() callback function. Creates a mapping between a GPIO pin
* and a virtual IRQ, if not already present.
*/
static int rockchip_gpio_to_irq(struct gpio_chip *gc, unsigned int offset)
{
struct rockchip_pin_bank *bank = gpiochip_get_data(gc);
unsigned int virq;
if (!bank->domain)
return -ENXIO;
virq = irq_create_mapping(bank->domain, offset);
Annotation
- Immediate include surface: `linux/bitops.h`, `linux/clk.h`, `linux/device.h`, `linux/err.h`, `linux/gpio/driver.h`, `linux/init.h`, `linux/interrupt.h`, `linux/io.h`.
- Detected declarations: `function gpio_writel_v2`, `function gpio_readl_v2`, `function rockchip_gpio_writel`, `function rockchip_gpio_readl`, `function rockchip_gpio_writel_bit`, `function rockchip_gpio_readl_bit`, `function rockchip_gpio_get_direction`, `function rockchip_gpio_set_direction`, `function rockchip_gpio_set`, `function rockchip_gpio_get`.
- Atlas domain: Driver Families / drivers/gpio.
- Implementation status: integration implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.