drivers/gpu/drm/amd/amdgpu/amdgpu_aca.h

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/amdgpu/amdgpu_aca.h

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/amd/amdgpu/amdgpu_aca.h
Extension
.h
Size
7664 bytes
Lines
233
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct aca_hwip {
	int hwid;
	int mcatype;
};

struct aca_bank {
	enum aca_error_type aca_err_type;
	enum aca_smu_type smu_err_type;
	u64 regs[ACA_MAX_REGS_COUNT];
};

struct aca_bank_node {
	struct aca_bank bank;
	struct list_head node;
};

struct aca_banks {
	int nr_banks;
	struct list_head list;
};

struct aca_bank_info {
	int die_id;
	int socket_id;
	int hwid;
	int mcatype;
};

struct aca_bank_error {
	struct list_head node;
	struct aca_bank_info info;
	u64 count;
};

struct aca_error {
	struct list_head list;
	struct mutex lock;
	enum aca_error_type type;
	int nr_errors;
};

struct aca_handle_manager {
	struct list_head list;
	int nr_handles;
};

struct aca_error_cache {
	struct aca_error errors[ACA_ERROR_TYPE_COUNT];
};

struct aca_handle {
	struct list_head node;
	enum aca_hwip_type hwip;
	struct amdgpu_device *adev;
	struct aca_handle_manager *mgr;
	struct aca_error_cache error_cache;
	const struct aca_bank_ops *bank_ops;
	struct device_attribute aca_attr;
	char attr_name[64];
	const char *name;
	u32 mask;
	void *data;
};

struct aca_bank_ops {
	int (*aca_bank_parser)(struct aca_handle *handle, struct aca_bank *bank, enum aca_smu_type type, void *data);
	bool (*aca_bank_is_valid)(struct aca_handle *handle, struct aca_bank *bank, enum aca_smu_type type,
				  void *data);
};

struct aca_smu_funcs {
	int max_ue_bank_count;
	int max_ce_bank_count;
	int (*set_debug_mode)(struct amdgpu_device *adev, bool enable);
	int (*get_valid_aca_count)(struct amdgpu_device *adev, enum aca_smu_type type, u32 *count);
	int (*get_valid_aca_bank)(struct amdgpu_device *adev, enum aca_smu_type type, int idx, struct aca_bank *bank);
	int (*parse_error_code)(struct amdgpu_device *adev, struct aca_bank *bank);
};

struct amdgpu_aca {
	struct aca_handle_manager mgr;
	const struct aca_smu_funcs *smu_funcs;
	atomic_t ue_update_flag;
	bool is_enabled;
};

struct aca_info {
	enum aca_hwip_type hwip;
	const struct aca_bank_ops *bank_ops;
	u32 mask;

Annotation

Implementation Notes