drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c- Extension
.c- Size
- 191309 bytes
- Lines
- 6975
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/aperture.hlinux/power_supply.hlinux/kthread.hlinux/module.hlinux/console.hlinux/slab.hlinux/iommu.hlinux/pci.hlinux/pci-p2pdma.hlinux/apple-gmux.hlinux/nospec.hdrm/drm_atomic_helper.hdrm/drm_client_event.hdrm/drm_crtc_helper.hdrm/drm_probe_helper.hdrm/amdgpu_drm.hlinux/device.hlinux/vgaarb.hlinux/vga_switcheroo.hlinux/efi.hamdgpu.hamdgpu_trace.hamdgpu_i2c.hatom.hamdgpu_atombios.hamdgpu_atomfirmware.hamd_pcie.hsi.hcik.hvi.hsoc15.hnv.h
Detected Declarations
function amdgpu_ip_member_of_hwinifunction amdgpu_set_init_levelfunction replaysfunction amdgpu_device_attr_sysfs_initfunction amdgpu_device_attr_sysfs_finifunction amdgpu_sysfs_reg_state_getfunction amdgpu_reg_state_sysfs_initfunction amdgpu_reg_state_sysfs_finifunction amdgpu_device_get_board_infofunction amdgpu_board_attrs_is_visiblefunction carveout_options_showfunction carveout_showfunction carveout_storefunction amdgpu_uma_sysfs_initfunction amdgpu_uma_sysfs_finifunction amdgpu_device_supports_pxfunction amdgpu_device_supports_bocofunction MACOfunction amdgpu_device_detect_runtime_pm_modefunction amdgpu_device_supports_smart_shiftfunction amdgpu_device_mm_accessfunction amdgpu_device_aper_accessfunction amdgpu_device_vram_accessfunction amdgpu_device_skip_hw_accessfunction amdgpu_device_get_rev_idfunction amdgpu_device_get_vbios_flagsfunction amdgpu_device_asic_initfunction amdgpu_device_mem_scratch_initfunction amdgpu_device_mem_scratch_finifunction amdgpu_device_program_register_sequencefunction amdgpu_device_pci_config_resetfunction interfacesfunction eventsfunction memoryfunction driverfunction driverfunction amdgpu_device_resize_fb_barfunction pci_bus_for_each_resourcefunction initializedfunction amdgpu_device_seamless_boot_supportedfunction amdgpu_device_pcie_dynamic_switching_supportedfunction amdgpu_device_aspm_support_quirkfunction amdgpu_device_should_use_aspmfunction amdgpu_device_vga_set_decodefunction amdgpu_device_check_block_sizefunction amdgpu_device_check_vm_sizefunction amdgpu_device_check_smu_prv_buffer_sizefunction amdgpu_device_init_apu_flags
Annotated Snippet
if (memory_carved >= SZ_1G/SZ_1M) {
size += sysfs_emit_at(buf, size, "%d: %s (%u GB)\n",
i,
uma_info->entries[i].name,
memory_carved >> 10);
} else {
size += sysfs_emit_at(buf, size, "%d: %s (%u MB)\n",
i,
uma_info->entries[i].name,
memory_carved);
}
}
return size;
}
static DEVICE_ATTR_RO(carveout_options);
/**
* DOC: uma/carveout
*
* This file is both readable and writable. When read, it shows the
* index of the current setting. Writing a valid index to this file
* allows users to change the UMA carveout size to the selected option
* on the next boot.
*
* The available options and their corresponding indices can be read
* from the uma/carveout_options file.
*/
static ssize_t carveout_show(struct device *dev,
struct device_attribute *attr,
char *buf)
{
struct drm_device *ddev = dev_get_drvdata(dev);
struct amdgpu_device *adev = drm_to_adev(ddev);
return sysfs_emit(buf, "%u\n", adev->uma_info.uma_option_index);
}
static ssize_t carveout_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct drm_device *ddev = dev_get_drvdata(dev);
struct amdgpu_device *adev = drm_to_adev(ddev);
struct amdgpu_uma_carveout_info *uma_info = &adev->uma_info;
struct amdgpu_uma_carveout_option *opt;
unsigned long val;
uint8_t flags;
int r;
r = kstrtoul(buf, 10, &val);
if (r)
return r;
if (val >= uma_info->num_entries)
return -EINVAL;
val = array_index_nospec(val, uma_info->num_entries);
opt = &uma_info->entries[val];
if (!(opt->flags & AMDGPU_UMA_FLAG_AUTO) &&
!(opt->flags & AMDGPU_UMA_FLAG_CUSTOM)) {
drm_err_once(ddev, "Option %lu not supported due to lack of Custom/Auto flag", val);
return -EINVAL;
}
flags = opt->flags;
flags &= ~((flags & AMDGPU_UMA_FLAG_AUTO) >> 1);
guard(mutex)(&uma_info->update_lock);
r = amdgpu_acpi_set_uma_allocation_size(adev, val, flags);
if (r)
return r;
uma_info->uma_option_index = val;
return count;
}
static DEVICE_ATTR_RW(carveout);
static struct attribute *amdgpu_uma_attrs[] = {
&dev_attr_carveout.attr,
&dev_attr_carveout_options.attr,
NULL
};
const struct attribute_group amdgpu_uma_attr_group = {
.name = "uma",
.attrs = amdgpu_uma_attrs
Annotation
- Immediate include surface: `linux/aperture.h`, `linux/power_supply.h`, `linux/kthread.h`, `linux/module.h`, `linux/console.h`, `linux/slab.h`, `linux/iommu.h`, `linux/pci.h`.
- Detected declarations: `function amdgpu_ip_member_of_hwini`, `function amdgpu_set_init_level`, `function replays`, `function amdgpu_device_attr_sysfs_init`, `function amdgpu_device_attr_sysfs_fini`, `function amdgpu_sysfs_reg_state_get`, `function amdgpu_reg_state_sysfs_init`, `function amdgpu_reg_state_sysfs_fini`, `function amdgpu_device_get_board_info`, `function amdgpu_board_attrs_is_visible`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.