drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c- Extension
.c- Size
- 50612 bytes
- Lines
- 1800
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/io-64-nonatomic-lo-hi.hasm/hypervisor.hamdgpu.hamdgpu_gmc.hamdgpu_ras.hamdgpu_reset.hamdgpu_xgmi.hamdgpu_atomfirmware.hdrm/drm_drv.hdrm/ttm/ttm_tt.h
Detected Declarations
function amdgpu_gmc_is_pdb0_enabledfunction amdgpu_gmc_pdb0_allocfunction PDEfunction amdgpu_gmc_pd_addrfunction amdgpu_gmc_set_pte_pdefunction amdgpu_gmc_agp_addrfunction amdgpu_gmc_vram_locationfunction gartfunction amdgpu_gmc_set_gart_sizefunction amdgpu_gmc_gart_locationfunction amdgpu_gmc_agp_locationfunction amdgpu_gmc_agp_locationfunction amdgpu_gmc_fault_keyfunction amdgpu_gmc_filter_faultsfunction amdgpu_gmc_filter_faults_removefunction amdgpu_gmc_handle_retry_faultfunction amdgpu_gmc_ras_sw_initfunction amdgpu_gmc_ras_late_initfunction amdgpu_gmc_ras_finifunction amdgpu_gmc_flush_gpu_tlbfunction amdgpu_gmc_flush_gpu_tlb_pasidfunction amdgpu_gmc_fw_reg_write_reg_waitfunction Zonesfunction IP_VERSIONfunction amdgpu_gmc_noretry_setfunction amdgpu_gmc_set_vm_fault_masksfunction amdgpu_gmc_init_vga_resv_regionsfunction amdgpu_gmc_init_pdb0function amdgpu_gmc_vram_mc2pafunction amdgpu_gmc_vram_pafunction amdgpu_gmc_vram_checkingfunction available_memory_partition_showfunction for_each_instfunction current_memory_partition_storefunction current_memory_partition_showfunction amdgpu_gmc_sysfs_initfunction amdgpu_gmc_sysfs_finifunction amdgpu_gmc_get_nps_memrangesfunction amdgpu_gmc_request_memory_partitionfunction amdgpu_gmc_need_nps_switch_reqfunction amdgpu_gmc_prepare_nps_mode_changefunction amdgpu_gmc_need_reset_on_initfunction amdgpu_gmc_get_vf_memory_partitionfunction amdgpu_gmc_get_memory_partitionfunction amdgpu_gmc_query_memory_partitionfunction amdgpu_gmc_validate_partition_infofunction amdgpu_gmc_is_node_presentfunction amdgpu_gmc_init_acpi_mem_ranges
Annotated Snippet
if (atomic64_read(&fault->key) == key) {
/*
* if we get a fault which is already present in
* the fault_ring and the timestamp of
* the fault is after the expired timestamp,
* then this is a new fault that needs to be added
* into the fault ring.
*/
if (fault->timestamp_expiry != 0 &&
amdgpu_ih_ts_after(fault->timestamp_expiry,
timestamp))
break;
else
return true;
}
tmp = fault->timestamp;
fault = &gmc->fault_ring[fault->next];
/* Check if the entry was reused */
if (fault->timestamp >= tmp)
break;
}
/* Add the fault to the ring */
fault = &gmc->fault_ring[gmc->last_fault];
atomic64_set(&fault->key, key);
fault->timestamp = timestamp;
/* And update the hash */
fault->next = gmc->fault_hash[hash].idx;
gmc->fault_hash[hash].idx = gmc->last_fault++;
return false;
}
/**
* amdgpu_gmc_filter_faults_remove - remove address from VM faults filter
*
* @adev: amdgpu device structure
* @addr: address of the VM fault
* @pasid: PASID of the process causing the fault
*
* Remove the address from fault filter, then future vm fault on this address
* will pass to retry fault handler to recover.
*/
void amdgpu_gmc_filter_faults_remove(struct amdgpu_device *adev, uint64_t addr,
uint16_t pasid)
{
struct amdgpu_gmc *gmc = &adev->gmc;
uint64_t key = amdgpu_gmc_fault_key(addr, pasid);
struct amdgpu_ih_ring *ih;
struct amdgpu_gmc_fault *fault;
uint32_t last_wptr;
uint64_t last_ts;
uint32_t hash;
uint64_t tmp;
if (adev->irq.retry_cam_enabled)
return;
else if (adev->irq.ih1.ring_size)
ih = &adev->irq.ih1;
else if (adev->irq.ih_soft.enabled)
ih = &adev->irq.ih_soft;
else
return;
/* Get the WPTR of the last entry in IH ring */
last_wptr = amdgpu_ih_get_wptr(adev, ih);
/* Order wptr with ring data. */
rmb();
/* Get the timetamp of the last entry in IH ring */
last_ts = amdgpu_ih_decode_iv_ts(adev, ih, last_wptr, -1);
hash = hash_64(key, AMDGPU_GMC_FAULT_HASH_ORDER);
fault = &gmc->fault_ring[gmc->fault_hash[hash].idx];
do {
if (atomic64_read(&fault->key) == key) {
/*
* Update the timestamp when this fault
* expired.
*/
fault->timestamp_expiry = last_ts;
break;
}
tmp = fault->timestamp;
fault = &gmc->fault_ring[fault->next];
} while (fault->timestamp < tmp);
}
Annotation
- Immediate include surface: `linux/io-64-nonatomic-lo-hi.h`, `asm/hypervisor.h`, `amdgpu.h`, `amdgpu_gmc.h`, `amdgpu_ras.h`, `amdgpu_reset.h`, `amdgpu_xgmi.h`, `amdgpu_atomfirmware.h`.
- Detected declarations: `function amdgpu_gmc_is_pdb0_enabled`, `function amdgpu_gmc_pdb0_alloc`, `function PDE`, `function amdgpu_gmc_pd_addr`, `function amdgpu_gmc_set_pte_pde`, `function amdgpu_gmc_agp_addr`, `function amdgpu_gmc_vram_location`, `function gart`, `function amdgpu_gmc_set_gart_size`, `function amdgpu_gmc_gart_location`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.