drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c- Extension
.c- Size
- 15704 bytes
- Lines
- 608
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
amdgpu.hamdgpu_jpeg.hamdgpu_pm.hsoc15d.hsoc15_common.h
Detected Declarations
function amdgpu_jpeg_sw_initfunction amdgpu_jpeg_sw_finifunction amdgpu_jpeg_suspendfunction amdgpu_jpeg_resumefunction amdgpu_jpeg_idle_work_handlerfunction amdgpu_jpeg_ring_begin_usefunction amdgpu_jpeg_ring_end_usefunction amdgpu_jpeg_dec_ring_test_ringfunction amdgpu_jpeg_dec_set_regfunction amdgpu_jpeg_dec_ring_test_ibfunction amdgpu_jpeg_process_poison_irqfunction amdgpu_jpeg_ras_late_initfunction amdgpu_jpeg_ras_sw_initfunction amdgpu_jpeg_psp_update_sramfunction amdgpu_debugfs_jpeg_sched_mask_setfunction amdgpu_debugfs_jpeg_sched_mask_getfunction amdgpu_debugfs_jpeg_sched_mask_initfunction amdgpu_get_jpeg_reset_maskfunction amdgpu_jpeg_sysfs_reset_mask_initfunction amdgpu_jpeg_sysfs_reset_mask_finifunction amdgpu_jpeg_reg_dump_initfunction amdgpu_jpeg_reg_dump_finifunction amdgpu_jpeg_dump_ip_statefunction amdgpu_jpeg_print_ip_statefunction amdgpu_jpeg_reg_validfunction amdgpu_jpeg_dec_parse_cs
Annotated Snippet
if (adev->jpeg.indirect_sram) {
r = amdgpu_bo_create_kernel(adev, 64 * 2 * 4, PAGE_SIZE,
AMDGPU_GEM_DOMAIN_VRAM |
AMDGPU_GEM_DOMAIN_GTT,
&adev->jpeg.inst[i].dpg_sram_bo,
&adev->jpeg.inst[i].dpg_sram_gpu_addr,
&adev->jpeg.inst[i].dpg_sram_cpu_addr);
if (r) {
dev_err(adev->dev,
"JPEG %d (%d) failed to allocate DPG bo\n", i, r);
return r;
}
}
}
return 0;
}
int amdgpu_jpeg_sw_fini(struct amdgpu_device *adev)
{
int i, j;
for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) {
if (adev->jpeg.harvest_config & (1U << i))
continue;
amdgpu_bo_free_kernel(
&adev->jpeg.inst[i].dpg_sram_bo,
&adev->jpeg.inst[i].dpg_sram_gpu_addr,
(void **)&adev->jpeg.inst[i].dpg_sram_cpu_addr);
for (j = 0; j < adev->jpeg.num_jpeg_rings; ++j)
amdgpu_ring_fini(&adev->jpeg.inst[i].ring_dec[j]);
}
if (adev->jpeg.reg_list)
amdgpu_jpeg_reg_dump_fini(adev);
mutex_destroy(&adev->jpeg.jpeg_pg_lock);
return 0;
}
int amdgpu_jpeg_suspend(struct amdgpu_device *adev)
{
cancel_delayed_work_sync(&adev->jpeg.idle_work);
return 0;
}
int amdgpu_jpeg_resume(struct amdgpu_device *adev)
{
return 0;
}
static void amdgpu_jpeg_idle_work_handler(struct work_struct *work)
{
struct amdgpu_device *adev =
container_of(work, struct amdgpu_device, jpeg.idle_work.work);
unsigned int fences = 0;
unsigned int i, j;
for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) {
if (adev->jpeg.harvest_config & (1U << i))
continue;
for (j = 0; j < adev->jpeg.num_jpeg_rings; ++j)
fences += amdgpu_fence_count_emitted(&adev->jpeg.inst[i].ring_dec[j]);
}
if (!fences && !atomic_read(&adev->jpeg.total_submission_cnt)) {
mutex_lock(&adev->jpeg.jpeg_pg_lock);
amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_JPEG,
AMD_PG_STATE_GATE);
mutex_unlock(&adev->jpeg.jpeg_pg_lock);
} else
schedule_delayed_work(&adev->jpeg.idle_work, JPEG_IDLE_TIMEOUT);
}
void amdgpu_jpeg_ring_begin_use(struct amdgpu_ring *ring)
{
struct amdgpu_device *adev = ring->adev;
atomic_inc(&adev->jpeg.total_submission_cnt);
cancel_delayed_work_sync(&adev->jpeg.idle_work);
mutex_lock(&adev->jpeg.jpeg_pg_lock);
amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_JPEG,
AMD_PG_STATE_UNGATE);
mutex_unlock(&adev->jpeg.jpeg_pg_lock);
Annotation
- Immediate include surface: `amdgpu.h`, `amdgpu_jpeg.h`, `amdgpu_pm.h`, `soc15d.h`, `soc15_common.h`.
- Detected declarations: `function amdgpu_jpeg_sw_init`, `function amdgpu_jpeg_sw_fini`, `function amdgpu_jpeg_suspend`, `function amdgpu_jpeg_resume`, `function amdgpu_jpeg_idle_work_handler`, `function amdgpu_jpeg_ring_begin_use`, `function amdgpu_jpeg_ring_end_use`, `function amdgpu_jpeg_dec_ring_test_ring`, `function amdgpu_jpeg_dec_set_reg`, `function amdgpu_jpeg_dec_ring_test_ib`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.