drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c- Extension
.c- Size
- 17634 bytes
- Lines
- 634
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: operation-table or driver-model contract
- Status
- pattern implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines an operation table; this is where Linux turns generic core objects into subsystem-specific behavior.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
amdgpu_ras.hamdgpu.hamdgpu_mca.humc/umc_6_7_0_offset.humc/umc_6_7_0_sh_mask.h
Detected Declarations
function filesfunction amdgpu_mca_query_correctable_error_countfunction amdgpu_mca_query_uncorrectable_error_countfunction amdgpu_mca_reset_error_countfunction amdgpu_mca_query_ras_error_countfunction amdgpu_mca_mp0_ras_sw_initfunction amdgpu_mca_mp1_ras_sw_initfunction amdgpu_mca_mpio_ras_sw_initfunction amdgpu_mca_bank_set_initfunction amdgpu_mca_bank_set_add_entryfunction amdgpu_mca_bank_set_mergefunction amdgpu_mca_bank_set_remove_nodefunction amdgpu_mca_bank_set_releasefunction amdgpu_mca_smu_init_funcsfunction amdgpu_mca_initfunction amdgpu_mca_finifunction amdgpu_mca_resetfunction amdgpu_mca_smu_set_debug_modefunction amdgpu_mca_smu_mca_bank_dumpfunction amdgpu_mca_smu_get_valid_mca_countfunction amdgpu_mca_smu_get_mca_entryfunction amdgpu_mca_bank_should_updatefunction amdgpu_mca_bank_should_dumpfunction amdgpu_mca_smu_get_mca_setfunction amdgpu_mca_smu_parse_mca_error_countfunction amdgpu_mca_dispatch_mca_setfunction list_for_each_entry_safefunction amdgpu_mca_add_mca_set_to_cachefunction amdgpu_mca_smu_log_ras_errorfunction amdgpu_mca_smu_debug_mode_setfunction mca_dump_entryfunction mca_dump_showfunction mca_dump_ce_showfunction mca_dump_ce_openfunction mca_dump_ue_showfunction mca_dump_ue_openfunction amdgpu_mca_smu_debugfs_init
Annotated Snippet
static const struct file_operations mca_ce_dump_debug_fops = {
.owner = THIS_MODULE,
.open = mca_dump_ce_open,
.read = seq_read,
.llseek = seq_lseek,
.release = single_release,
};
static int mca_dump_ue_show(struct seq_file *m, void *unused)
{
return mca_dump_show(m, AMDGPU_MCA_ERROR_TYPE_UE);
}
static int mca_dump_ue_open(struct inode *inode, struct file *file)
{
return single_open(file, mca_dump_ue_show, inode->i_private);
}
static const struct file_operations mca_ue_dump_debug_fops = {
.owner = THIS_MODULE,
.open = mca_dump_ue_open,
.read = seq_read,
.llseek = seq_lseek,
.release = single_release,
};
DEFINE_DEBUGFS_ATTRIBUTE(mca_debug_mode_fops, NULL, amdgpu_mca_smu_debug_mode_set, "%llu\n");
#endif
void amdgpu_mca_smu_debugfs_init(struct amdgpu_device *adev, struct dentry *root)
{
#if defined(CONFIG_DEBUG_FS)
if (!root)
return;
debugfs_create_file("mca_debug_mode", 0200, root, adev, &mca_debug_mode_fops);
debugfs_create_file("mca_ue_dump", 0400, root, adev, &mca_ue_dump_debug_fops);
debugfs_create_file("mca_ce_dump", 0400, root, adev, &mca_ce_dump_debug_fops);
#endif
}
Annotation
- Immediate include surface: `amdgpu_ras.h`, `amdgpu.h`, `amdgpu_mca.h`, `umc/umc_6_7_0_offset.h`, `umc/umc_6_7_0_sh_mask.h`.
- Detected declarations: `function files`, `function amdgpu_mca_query_correctable_error_count`, `function amdgpu_mca_query_uncorrectable_error_count`, `function amdgpu_mca_reset_error_count`, `function amdgpu_mca_query_ras_error_count`, `function amdgpu_mca_mp0_ras_sw_init`, `function amdgpu_mca_mp1_ras_sw_init`, `function amdgpu_mca_mpio_ras_sw_init`, `function amdgpu_mca_bank_set_init`, `function amdgpu_mca_bank_set_add_entry`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: pattern implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.